U632H64
Disabling Automatic STORES: STORE Cycle Inhibit and Automatic Power Up RECALL
VCAP
5.0 V
VSWITCH
t
STORE inhibit
Power Up
RECALL
(24)
tRESTORE
Power
Supply
VCAP
VCCX
HSB
VCCX
28
Power
Supply
VCAP
28
27
26
25
24
23
22
21
20
19
18
10 KΩ
1
2
3
4
1
2
3
4
(optional,
see description HSB
nonvolatile store)
27
26
25
10 KΩ
(optional,
see description HSB
nonvolatile store)
HSB
24
23
22
21
20
5
6
7
8
5
6
7
8
+
0.1 μF
100 μF
0.1 μF
Bypass
Bypass
20%
9
9
10
11
10
11
19
18
12
13
14
12
13
14
17
16
15
17
16
15
VSS
VSS
Figure 1: Automatic STORE Operation
Figure 2: Disabling Automatic STORES
Schematic Diagram
Schematic Diagram
Low Average Active Power
The U632H64 has been designed to draw significantly 1. CMOS or TTL input levels
less power when E is LOW (chip enabled) but the 2. the time during which the chip is disabled (E HIGH)
access cycle time is longer than 55 ns.
When E is HIGH the chip consumes only standby cur- 4. the ratio of READs to WRITEs
rent. 5. the operating temperature
3. the cycle time for accesses (E LOW)
The overall average current drawn by the part depends 6. the power supply voltage level
on the following items:
The information describes the type of component and shall not be considered as assured characteristics. Terms of
delivery and rights to change design reserved.
August 15, 2006
STK Control #ML0047
13
Rev 1.1
SIMTEK [ SIMTEK CORPORATION ]
