STK16CA8
MODE SELECTION
E
H
L
W
X
H
L
G
X
L
A
- A (hex)
0
MODE
I/O
POWER
NOTES
15
X
X
X
Not Selected
Read SRAM
Write SRAM
Output High Z
Output Data
Input Data
Standby
Active
L
X
Active
4E38
B1C7
83E0
7C1F
703F
8B45
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Autostore Inhibit
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Active
L
L
L
L
H
H
H
H
L
L
L
L
k, l, m
k, l, m
4E38
B1C7
83E0
7C1F
703F
4B46
Read SRAM
Read SRAM
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Read SRAM
Active
Active
Read SRAM
Read SRAM
Autostore inhibit off
4E38
B1C7
83E0
7C1F
703F
8FC0
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile Store
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
k, l, m
k, l, m
l
CC
2
4E38
B1C7
83E0
7C1F
703F
4C63
Read SRAM
Read SRAM
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Read SRAM
Active
Read SRAM
Read SRAM
Nonvolatile Recall
Note k: The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.
Note l: While there are 17 addresses on the STK16CA8, only the lower 16 are used to control software modes.
Note m: I/O state depends on the state of G. The I/O table shown assumes G low.
September 2003
5
Document Control # ML0023 rev 0.1