SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Address
Offset
Register Name
16 15
Channel 1 TF
Access
Type
31
00
Channel 1 TF
Sector Count 2
Ext
Channel 1 TF
Cylinder High 2
Ext
R/W
Channel 1 TF
Cylinder Low 2 Ext
D8H
Starting Sector 2
Ext
DCH
E0H
Channel 1 Virtual DMA/PIO Read Ahead Byte Count
R/W
R/W
Channel 1
Reserved
Channel 1
Config + Status
Cmd + Status
E4H
E8H
ECH
F0H
Reserved
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
Channel 1 Test Register
Channel 1 Data
Transfer Mode
F4H
Reserved
F8H
FCH
Reserved
Reserved
-
-
100H
104H
108H
10CH
110H
114H
118H
11CH
120H
124H
128H
12CH
130H
134H
138H
13CH
140H
144H
148H
14CH
150H
154H
158H
15CH
160H
164H
168H
16CH
170H
174H
178H
17CH
180H
184H
188H
SControl (channel 0)
SStatus (channel 0)
SError (channel 0)
SActive (channel 0)
Reserved
R/W
R
R/C
R/W
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
-
Reserved
SMisc (channel 0)
PHY Configuration
SIEN (channel 0)
SFISCfg (channel 0)
Reserved
R/W
R/W
R/W
R/W
-
Reserved
-
Reserved
-
Reserved
-
RxFIS0 (channel 0)
RxFIS1 (channel 0)
RxFIS2 (channel 0)
RxFIS3 (channel 0)
RxFIS4 (channel 0)
RxFIS5 (channel 0)
RxFIS6 (channel 0)
Reserved
R
R
R
R
R
R
R
-
SControl (channel 1)
SStatus (channel 1)
SError (channel 1)
R/W
R/W
R/C
SiI-DS-0103-D
48
© 2007 Silicon Image, Inc.