SiI 1160 PanelLink Transmitter
Data Sheet
Spread Spectrum Support
TMDS architecture is inherently jitter-tolerant. Spread spectrum clocking can be applied to the clock and parallel
data inputs of the SiI 1160 to allow for reduced EMI. The spread will be propagated throughout the system due to
TMDS clock architecture, which passes nearly all low-frequency components of the incoming clock without
attenuation. The amount of spread that can be applied without affecting the DVI eye is limited to ±0.5% with the
current part, depending on the spreading algorithm employed by the external spread spectrum device.
A planned future variation of this chip will allow its internal clock to be coupled directly to a spread spectrum
device. The expected result will be the ability to accommodate larger amounts of spread, and it will also work in
48-bit mode as well as 24-bit mode. Designs should make accommodations using pins 27, 83, and 84 as noted
in the Pin Descriptions section so that the planned part can become a drop-in replacement for the SiI 1160.
Figure 12 illustrates how a design can anticipate the expected future chip version. Contact PhaseLink
Corporation for additional information on their spread spectrum device.
1160: Stuff
3.3V
SS: Stuff
SiI 1160 /
or future
SS version
1160: No Stuff
SS: Stuff 0Ω
PhaseLink
PLL701-21
3.3V
1-FIN VDD-8
2-S2
S3-7
3-S1 FOUT-6
4-S0 GND-5
3.3V
Figure 12. Planned Spread Spectrum Support Circuit
21
SiI-DS-0126-B
SILICONIMAGE [ Silicon image ]
