欢迎访问ic37.com |
会员登录 免费注册
发布采购

SII0680ACLU144 参数 Datasheet PDF下载

SII0680ACLU144图片预览
型号: SII0680ACLU144
PDF下载: 下载PDF文件 查看货源
内容描述: PCI转IDE / ATA [PCI to IDE/ATA]
分类和应用: PC
文件页数/大小: 124 页 / 782 K
品牌: SILICONIMAGE [ Silicon image ]
 浏览型号SII0680ACLU144的Datasheet PDF文件第77页浏览型号SII0680ACLU144的Datasheet PDF文件第78页浏览型号SII0680ACLU144的Datasheet PDF文件第79页浏览型号SII0680ACLU144的Datasheet PDF文件第80页浏览型号SII0680ACLU144的Datasheet PDF文件第82页浏览型号SII0680ACLU144的Datasheet PDF文件第83页浏览型号SII0680ACLU144的Datasheet PDF文件第84页浏览型号SII0680ACLU144的Datasheet PDF文件第85页  
SiI0680A PCI to IDE/ATA  
Data Sheet  
Silicon Image, Inc.  
9.7.17 EEPROM Memory Address – Command + Status  
Address Offset: 58H  
Access Type: Read/Write  
Reset Value: 0x0000_0000  
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  
Reserved  
Reserved  
Mem Address  
This register defines the address and command/status register for EEPROM memory interface in the SiI 0680A. The register  
bits are defined below.  
Bit [31:29]: Reserved (R). This bit field is reserved and returns zeros on a read.  
Bit [28]: Mem Error (R/W1C) – Memory Access Error. This bit set indicates that the EEPROM interface logic  
detects three NAKs from the memory device.  
Bit [27]: Mem Init Done (R) – Memory Initialization Done. This bit set indicates that the memory initialization  
sequence is done. The memory initialization sequence is activated upon the release of reset.  
Bit [26]: Reserved (R) This bit is reserved and returns an indeterminate value on a read.  
Bit [25]: Mem Access Start (R/W) – Memory Access Start. This bit is set to initiate an operation to EEPROM  
memory. This bit is cleared by the chip when the operation is complete.  
Bit [24]: Mem Access Type (R/W) – Memory Access Type. This bit is set to define a read operation from  
EEPROM memory. This bit is cleared to define a write operation to EEPROM memory.  
Bit [23:16]: Reserved (R). This bit field is reserved and returns zeros on a read.  
Bit [15:00]: Memory Address (R/W). This bit field is programmed with the address for an EEPROM memory  
read or write access.  
9.7.18 EEPROM Memory Data  
Address Offset: 5CH  
Access Type: Read/Write  
Reset Value: 0x0000_0000  
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  
Reserved  
Memory Data  
This register defines the data register for EEPROM memory interface in the SiI 0680A. The system writes to this register for a  
write operation to EEPROM memory, and reads from this register on a read operation from EEPROM memory. The register  
bits are defined below.  
Bit [31:08]: Reserved (R). This bit field is reserved and returns zeros on a read.  
Bit [07:00]: Memory Data (R/W) – EEPROM Memory Data. This bit field is used for EEPROM write data on a  
write operation, and returns the EEPROM read data on a read operation.  
© 2006 Silicon Image, Inc.  
SiI-DS-0069-C  
81  
 复制成功!