SiI0680A PCI to IDE/ATA
Data Sheet
Silicon Image, Inc.
Table of Contents
1. Overview..............................................................................................................................................9
1.1 Key Benefits................................................................................................................................................ 9
1.2 Features....................................................................................................................................................... 9
1.2.1 Overall Features......................................................................................................................................................9
1.2.2 PCI Features ...........................................................................................................................................................9
1.2.3 ATA Features ........................................................................................................................................................10
1.2.4 Other Features ......................................................................................................................................................10
1.3 SiI 0680A Technical Description............................................................................................................. 10
1.4 References ................................................................................................................................................ 10
1.5 Functional Description............................................................................................................................. 10
1.6 Functional Block Diagram ....................................................................................................................... 11
1.7 PCI Interface.............................................................................................................................................. 12
1.8 PCI Initialization........................................................................................................................................ 12
1.9 PCI Bus Operations.................................................................................................................................. 12
1.10 PCI Configuration Space ....................................................................................................................... 13
1.11 Deviations from the Specification ........................................................................................................ 13
2.1 Device Electrical Characteristics ............................................................................................................... 14
2.2 PCI 33 MHz Timing Specifications.......................................................................................................... 15
2.3 ATA/ATAPI-6 Slew Rate Specifications ................................................................................................. 15
2.4 ATA/ATAPI-6 AC/DC Specifications ...................................................................................................... 15
2.5 Power Supply Bypass Considerations.................................................................................................. 16
3. Pin Definition.....................................................................................................................................17
3.1 SiI 0680A Pin Listing ................................................................................................................................ 17
3.2 SiI 0680A Pin Diagram.............................................................................................................................. 23
3.3 SiI 0680A Pin Descriptions ......................................................................................................................... 24
3.3.1 IDE/ATA Primary Channel.........................................................................................................................................24
3.3.2 IDE/ATA Secondary Channel....................................................................................................................................25
3.3.3 PCI 33MHz 32-bit Section .........................................................................................................................................27
3.3.4 Miscellaneous I/O.....................................................................................................................................................29
4. Package Drawing..............................................................................................................................32
5. ASIC Block Diagram .........................................................................................................................34
6. Clocking System...............................................................................................................................37
7. Phased Locked Loop (PLL)..............................................................................................................38
7.1 PLL Connections...................................................................................................................................... 38
7.1.1 PLL Schematic ......................................................................................................................................................38
7.1.2
7.1.3
PLL Components................................................................................................................................................39
PLL Layout Requirements ..................................................................................................................................40
8. Auto-Initialization..............................................................................................................................43
8.1 Auto-Initialization from FLASH ............................................................................................................... 43
8.2 Auto-Initialization from EEPROM............................................................................................................ 44
9. Register Definitions..........................................................................................................................46
9.1 PCI Configuration Space ......................................................................................................................... 46
9.1.1 Device ID – Vendor ID...........................................................................................................................................48
9.1.2 PCI Status – PCI Command..................................................................................................................................48
9.1.3 PCI Class Code – Revision ID...............................................................................................................................49
9.1.4 BIST – Header Type – Latency Timer – Cache Line Size .....................................................................................50
9.1.5 Base Address Register 0.......................................................................................................................................50
9.1.6 Base Address Register 1.......................................................................................................................................50
9.1.7 Base Address Register 2.......................................................................................................................................51
© 2006 Silicon Image, Inc.
SiI-DS-0069-C
3