SiI0680A PCI to IDE/ATA
Data Sheet
Silicon Image, Inc.
3. Pin Definition
3.1 PCI-680 Pin Listing
This section describes the pin-out of the SiI 0680A PCI-to-ATA host controller ASIC.
Pin
#
Pin Name
Type
Drive
Internal
Resistor
Description
1
2
3
4
5
6
7
8
VSS
GND
PWR
Analog
Analog
Analog
GND
I
-
-
Ground
PLL_VDD
-
-
PLL 3.3 Volt Power
PLL Charge Pump Bias
PLL VCO Bias
PLL_CPBIAS
PLL_VCOBIAS
PLL_LOOPFLT
PLL_GND
-
-
-
-
-
-
PLL Loop Filter
-
-
PLL Ground
TEST_MODE
IDE0_DD00
-
PD – 20k
ASIC Test Mode Enable
I/O
ATA Buffer
PU – 100k IDE #0 Data Bus bit 0 / FLASH
memory address bit 18
9
IDE0_DD01
IDE0_DD02
IDE0_DD03
IDE0_DD04
IDE0_DD05
IDE0_DD06
IDE0_DD07
I/O
I/O
I/O
I/O
I/O
I/O
I/O
ATA Buffer
ATA Buffer
ATA Buffer
ATA Buffer
ATA Buffer
ATA Buffer
ATA Buffer
PU – 100k IDE #0 Data Bus bit 1 / FLASH
memory address bit 17
10
11
12
13
14
15
PU – 100k IDE #0 Data Bus bit 2 / FLASH
memory address bit 16
PU – 100k IDE #0 Data Bus bit 3 / FLASH
memory address bit 15
PU – 100k IDE #0 Data Bus bit 4 / FLASH
memory address bit 14
PU – 100k IDE #0 Data Bus bit 5 / FLASH
memory address bit 13
PU – 100k IDE #0 Data Bus bit 6 / FLASH
memory address bit 12
PD – 100k IDE #0 Data Bus bit 7 / FLASH
memory address bit 11
16
17
18
VDD
PWR
GND
I/O
-
-
-
3.3 Volt Power
Ground
VSS
-
IDE0_DD08
ATA Buffer
PU – 100k IDE #0 Data Bus bit 8 / FLASH
memory address bit 10
19
IDE0_DD09
I/O
ATA Buffer
PU – 100k IDE #0 Data Bus bit 9 / FLASH
memory address bit 9
Table 3-1: SiI 0680A Pin Listing
© 2006 Silicon Image, Inc.
SiI-DS-0069-C
17
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