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SI3056DC2-EVB 参数 Datasheet PDF下载

SI3056DC2-EVB图片预览
型号: SI3056DC2-EVB
PDF下载: 下载PDF文件 查看货源
内容描述: 全球串行接口直接访问安排 [GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT]
分类和应用:
文件页数/大小: 94 页 / 1395 K
品牌: SILICON [ SILICON ]
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Si3056  
Si3018/19/10  
Register 18. International Control 3  
Bit  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Name  
Type  
RFWE  
R/W  
Reset settings = 0000_0000  
Bit  
7:2  
1
Name  
Reserved Read returns zero or one.  
RFWE  
Function  
Ring Detector Full-Wave Rectifier Enable.  
When RNGV (Register 24) is disabled, this bit controls the ring detector mode and the asser-  
tion of the RGDT pin. When RNGV is enabled, this bit configures the RGDT pin to either follow  
the ringing signal detected by the ring validation circuit, or to follow an unqualified ring detect  
one-shot signal initiated by a ring-threshold crossing and terminated by a fixed counter time-  
out of approximately five seconds.  
RNGV  
RFWE  
RGDT  
0
0
1
1
0
1
0
1
Half-Wave  
Full-Wave  
Validated Ring Envelope  
Ring Threshold Crossing One-Shot  
0
Reserved Read returns zero or one.  
62  
Rev. 1.05  
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