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SI3056DC2-EVB 参数 Datasheet PDF下载

SI3056DC2-EVB图片预览
型号: SI3056DC2-EVB
PDF下载: 下载PDF文件 查看货源
内容描述: 全球串行接口直接访问安排 [GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT]
分类和应用:
文件页数/大小: 94 页 / 1395 K
品牌: SILICON [ SILICON ]
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Si3056  
Si3018/19/10  
Table 5. Absolute Maximum Ratings  
Parameter  
Symbol  
Value  
–0.5 to 3.6  
±10  
Unit  
V
DC Supply Voltage  
V
D
Input Current, Si3056 Digital Input Pins  
Digital Input Voltage  
I
mA  
V
IN  
V
–0.3 to (V + 0.3)  
IND  
D
Operating Temperature Range  
Storage Temperature Range  
T
–40 to 100  
–65 to 150  
°C  
°C  
A
T
STG  
Note: Permanent device damage can occur if the above absolute maximum ratings are exceeded. Restrict functional  
operation to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum  
rating conditions for extended periods might affect device reliability.  
Table 6. Switching Characteristics—General Inputs  
(VD = 3.0 to 3.6 V, TA = 0 to 70 °C, CL = 20 pF)  
1
Symbol  
Min  
Typ  
Max  
Unit  
Parameter  
Cycle Time, MCLK  
MCLK Duty Cycle  
MCLK Jitter Tolerance  
Rise Time, MCLK  
Fall Time, MCLK  
MCLK Before RESET ↑  
t
t
16.67  
40  
50  
1000  
60  
±2  
5
ns  
%
mc  
dty  
t
ns  
jitter  
t
ns  
r
t
5
ns  
f
t
10  
cycles  
ns  
mr  
2
RESET Pulse Width  
t
250  
20  
rl  
3
M0, M Before RESET↑  
t
ns  
mxr  
Notes:  
1. All timing (except Rise and Fall time) is referenced to the 50% level of the waveform. Input test levels are  
VIH = VD – 0.4 V, VIL = 0.4 V. Rise and fall times are referenced to the 20% and 80% levels of the waveform.  
2. The minimum RESET pulse width is the greater of 250 ns or 10 MCLK cycle times.  
3. M0 and M are typically connected to VD or GND and should not be changed during normal operation.  
tmc  
tr  
tf  
VIH  
VIL  
MCLK  
tmr  
RESET  
trl  
M0, M1  
tmxr  
Figure 2. General Inputs Timing Diagram  
10  
Rev. 1.05  
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