Si1000/1/2/3/4/5
Table 20.1. SmaRTClock Internal Registers
SmaRTClock SmaRTClock
Register Name
Description
Address
Register
0x00–0x03
CAPTUREn SmaRTClock Capture
Registers
Four Registers used for setting the 32-bit
SmaRTClock timer or reading its current value.
0x04
0x05
0x06
RTC0CN
SmaRTClock Control
Register
Controls the operation of the SmaRTClock State
Machine.
RTC0XCN SmaRTClock Oscillator Controls the operation of the SmaRTClock
Control Register Oscillator.
RTC0XCF SmaRTClock Oscillator Controls the value of the progammable
Configuration Register
oscillator load capacitance and
enables/disables AutoStep.
0x07
RTC0PIN
ALARMn
SmaRTClock Pin
Configuration Register
Note: Forces XTAL3 and XTAL4 to be internally
shorted.
This register also contains other reserved bits
which should not be modified.
0x08–0x0B
SmaRTClock Alarm
Registers
Four registers used for setting or reading the
32-bit SmaRTClock alarm value.
Rev. 1.0
191
SILICON [ SILICON ]
