Si1000/1/2/3/4/5
20. SmaRTClock (Real Time Clock)
Si1000/1/2/3/4/5 devices include an ultra low power 32-bit SmaRTClock Peripheral (Real Time Clock) with
alarm. The SmaRTClock has a dedicated 32 kHz oscillator that can be configured for use with or without a
crystal. No external resistor or loading capacitors are required. The on-chip loading capacitors are pro-
grammable to 16 discrete levels allowing compatibility with a wide range of crystals. The SmaRTClock can
operate directly from a 0.9–3.6 V battery voltage and remains operational even when the device goes into
its lowest power down mode.
The SmaRTClock allows a maximum of 36 hour 32-bit independent time-keeping when used with a
32.768 kHz Watch Crystal. The SmaRTClock provides an Alarm and Missing SmaRTClock events, which
could be used as reset or wakeup sources. See Section “18. Reset Sources” on page 175 and Section
“14. Power Management” on page 151 for details on reset sources and low power mode wake-up sources,
respectively.
XTAL3
XTAL4
SmaRTClock
Power/
Clock
Mgmt
Programmable Load Capacitors
SmaRTClock Oscillator
32-Bit
SmaRTClock
Timer
SmaRTClock State Machine
Wake-Up
Interrupt
Interface
Registers
CAPTUREn
RTC0CN
Internal
Registers
RTC0KEY
RTC0ADR
RTC0DAT
RTC0XCN
RTC0XCF
RTC0PIN
ALARMn
Figure 20.1. SmaRTClock Block Diagram
20.1. SmaRTClock Interface
The SmaRTClock Interface consists of three registers: RTC0KEY, RTC0ADR, and RTC0DAT. These inter-
face registers are located on the CIP-51’s SFR map and provide access to the SmaRTClock internal regis-
ters listed in Table 20.1. The SmaRTClock internal registers can only be accessed indirectly through the
SmaRTClock Interface.
190
Rev. 1.0
SILICON [ SILICON ]
