Si1000/1/2/3/4/5
SFR Definition 20.2. RTC0ADR: SmaRTClock Address
Bit
7
6
5
4
3
2
1
0
BUSY
AUTORD
SHORT
ADDR[3:0]
R/W
Name
Type
Reset
R/W
0
R/W
0
R
0
R/W
0
0
0
0
0
SFR Page = 0x0; SFR Address = 0xAC
Bit
Name
Function
7
BUSY
SmaRTClock Interface Busy Indicator.
Indicates SmaRTClock interface status. Writing 1 to this bit initiates an indirect read.
6
AUTORD SmaRTClock Interface Autoread Enable.
Enables/disables Autoread.
0: Autoread Disabled.
1: Autoread Enabled.
5
4
Unused
SHORT Short Strobe Enable.
Enables/disables the Short Strobe Feature.
Read = 0b; Write = Don’t Care.
0: Short Strobe disabled.
1: Short Strobe enabled.
3:0 ADDR[3:0] SmaRTClock Indirect Register Address.
Sets the currently selected SmaRTClock register.
See Table 20.1 for a listing of all SmaRTClock indirect registers.
Note: The ADDR bits increment after each indirect read/write operation that targets a CAPTUREn or ALARMn
internal SmaRTClock register.
Rev. 1.0
195
SILICON [ SILICON ]
