Si1000/1/2/3/4/5
SFR Definition 19.2. OSCICN: Internal Oscillator Control
Bit
7
6
5
4
3
2
1
0
IOSCEN
IFRDY
Reserved[5:0]
R/W R/W
Name
Type
Reset
R/W
0
R
0
R/W
0
R/W
0
R/W
1
R/W
1
1
1
SFR Page = 0x0; SFR Address = 0xB2
Bit
Name
Function
7
IOSCEN Internal Oscillator Enable.
0: Internal oscillator disabled.
1: Internal oscillator enabled.
6
Internal Oscillator Frequency Ready Flag.
IFRDY
0: Internal oscillator is not running at its programmed frequency.
1: Internal oscillator is running at its programmed frequency.
5:0
Reserved Read = 001111b. Must Write 001111b.
Note: It is recommended to use read-modify-write operations such as ORL and ANL to set or clear the enable bit of
this register.
SFR Definition 19.3. OSCICL: Internal Oscillator Calibration
Bit
7
6
5
4
3
2
1
0
SSE
OSCICL[6:0]
Name
Type
Reset
R/W
0
R
R/W
R/W
R/W
R/W
R/W
R/W
Varies
Varies
Varies
Varies
Varies
Varies
Varies
SFR Page = 0x0; SFR Address = 0xB3
Bit
Name
Function
7
Spread Spectrum Enable.
SSE
0: Spread Spectrum clock dithering disabled.
1: Spread Spectrum clock dithering enabled.
6:0
Internal Oscillator Calibration.
OSCICL
Factory calibrated to obtain a frequency of 24.5 MHz. Incrementing this register decreases the
oscillator frequency and decrementing this register increases the oscillator frequency. The
step size is approximately 1% of the calibrated frequency. The recommended calibration fre-
quency range is between 16 and 24.5 MHz.
Note: If the Precision Internal Oscillator is selected as the system clock, the following procedure should be used when
changing the value of the internal oscillator calibration bits.
1. Switch to a different clock source.
2. Disable the oscillator by writing OSCICN.7 to 0.
3. Change OSCICL to the desired setting.
4. Enable the oscillator by writing OSCICN.7 to 1.
188
Rev. 1.0
SILICON [ SILICON ]
