Si1000/1/2/3/4/5
23.5.7. Power Amplifier
The Si1000/1 contains an internal integrated power amplifier (PA) capable of transmitting at output levels
between +1 and +20 dBm. The Si1002/3/4/5 contains a PA which is capable of transmitting output levels
between –8 to +13 dBm. The PA design is single-ended and is implemented as a two stage class CE
amplifier with a high efficiency when transmitting at maximum power. The PA efficiency can only be opti-
mized at one power level. Changing the output power by adjusting txpow[2:0] will scale both the output
power and current but the efficiency will not remain constant. The PA output is ramped up and down to pre-
vent unwanted spectral splatter.
In the Si1002/3 the TX and RX may be tied directly. See the TX/RX direct-tie reference design available on
the Silicon Labs website for more details. When the direct tie is used the lna_sw bit in Register 6Dh, TX
Power must be set to 1.
23.5.7.1. Output Power Selection
The output power is configurable in 3 dB steps with the txpow[2:0] field in "Register 6Dh. TX Power". Extra
output power can allow the use of a cheaper smaller antenna, greatly reducing the overall BOM cost. The
higher power setting of the chip achieves maximum possible range, but of course comes at the cost of
higher TX current consumption. However, depending on the duty cycle of the system, the effect on battery
life may be insignificant. Contact Silicon Labs Support for help in evaluating this tradeoff.
D7
D6
D5
D4
D3
D2
D1
D0
POR
Def.
Add R/W Function/
Description
6D R/W
TX Power
reserved reserved reserved reserved lna_sw txpow[2] txpow[1] txpow[0] 18h
txpow[2:0]
000
Si10x0/1 Output Power
+1 dBm
001
+2 dBm
010
+5 dBm
011
+8 dBm
100
+11 dBm
101
+14 dBm
110
+17 dBm
111
+20 dBm
txpow[2:0]
Si10x2/3/4/5 Output
Power
000
001
010
011
100
101
110
111
–8 dBm
–5 dBm
–2 dBm
+1 dBm
+4 dBm
+7 dBm
+10 dBm
+13 dBm
Rev. 1.0
259
SILICON [ SILICON ]
