EFR32MG13 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Electrical Specifications
4.1.18 Digital to Analog Converter (VDAC)
DRIVESTRENGTH = 2 unless otherwise specified. Primary VDAC output.
Table 4.49. Digital to Analog Converter (VDAC)
Parameter
Symbol
Test Condition
Min
0
Typ
—
Max
Unit
V
Output voltage
VDACOUT
Single-Ended
VVREF
VVREF
Differential1
-VVREF
—
V
Current consumption includ- IDAC
ing references (2 channels)2
500 ksps, 12-bit, DRIVES-
TRENGTH = 2, REFSEL = 4
—
—
—
396
72
—
—
—
µA
µA
µA
44.1 ksps, 12-bit, DRIVES-
TRENGTH = 1, REFSEL = 4
200 Hz refresh rate, 12-bit Sam-
ple-Off mode in EM2, DRIVES-
TRENGTH = 2, REFSEL = 4,
SETTLETIME = 0x02, WARMUP-
TIME = 0x0A
1.2
Current from HFPERCLK3
Sample rate
IDAC_CLK
—
—
—
2
5.8
—
—
500
1
µA/MHz
ksps
MHz
µs
SRDAC
DAC clock frequency
Conversion time
Settling time
fDAC
—
tDACCONV
tDACSETTLE
tDACSTARTUP
fDAC = 1MHz
—
—
50% fs step settling to 5 LSB
—
—
2.5
—
—
µs
Startup time
Enable to 90% fs output, settling
to 10 LSB
12
µs
Output impedance
ROUT
DRIVESTRENGTH = 2, 0.4 V ≤
VOUT ≤ VOPA - 0.4 V, -8 mA <
IOUT < 8 mA, Full supply range
—
—
—
—
—
2
2
—
—
—
—
—
Ω
Ω
DRIVESTRENGTH = 0 or 1, 0.4 V
≤ VOUT ≤ VOPA - 0.4 V, -400 µA <
IOUT < 400 µA, Full supply range
DRIVESTRENGTH = 2, 0.1 V ≤
VOUT ≤ VOPA - 0.1 V, -2 mA <
IOUT < 2 mA, Full supply range
2
Ω
DRIVESTRENGTH = 0 or 1, 0.1 V
≤ VOUT ≤ VOPA - 0.1 V, -100 µA <
IOUT < 100 µA, Full supply range
2
Ω
Power supply rejection ratio4
PSRR
Vout = 50% fs. DC
65.5
dB
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