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C8051F530-IM 参数 Datasheet PDF下载

C8051F530-IM图片预览
型号: C8051F530-IM
PDF下载: 下载PDF文件 查看货源
内容描述: 8/4/2 KB ISP功能的Flash MCU系列 [8/4/2 kB ISP Flash MCU Family]
分类和应用:
文件页数/大小: 220 页 / 2701 K
品牌: SILICON [ SILICON ]
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C8051F52x-53x  
9.1.2. MOVX Instruction and Program Memory  
The MOVX instruction is typically used to access data stored in XDATA memory space. In the CIP-51, the  
MOVX instruction can also be used to write or erase on-chip program memory space implemented as re-  
programmable Flash memory. The Flash access feature provides a mechanism for the CIP-51 to update  
program code and use the program memory space for non-volatile data storage. Refer to Section  
“13. Flash Memory” on page 107 for further details.  
1
Table 9.1. CIP-51 Instruction Set Summary  
Clock  
Cycles  
Mnemonic  
Description  
Bytes  
Arithmetic Operations  
ADD A, Rn  
Add register to A  
Add direct byte to A  
Add indirect RAM to A  
Add immediate to A  
Add register to A with carry  
Add direct byte to A with carry  
Add indirect RAM to A with carry  
Add immediate to A with carry  
Subtract register from A with borrow  
Subtract direct byte from A with borrow  
Subtract indirect RAM from A with borrow  
Subtract immediate from A with borrow  
Increment A  
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
1
1
1
2
1
1
1
1
1
1
2
2
2
1
2
2
2
1
2
2
2
1
1
2
2
1
1
2
2
1
4
8
1
ADD A, direct  
ADD A, @Ri  
ADD A, #data  
ADDC A, Rn  
ADDC A, direct  
ADDC A, @Ri  
ADDC A, #data  
SUBB A, Rn  
SUBB A, direct  
SUBB A, @Ri  
SUBB A, #data  
INC A  
INC Rn  
INC direct  
INC @Ri  
DEC A  
DEC Rn  
DEC direct  
DEC @Ri  
INC DPTR  
MUL AB  
DIV AB  
Increment register  
Increment direct byte  
Increment indirect RAM  
Decrement A  
Decrement register  
Decrement direct byte  
Decrement indirect RAM  
Increment Data Pointer  
Multiply A and B  
Divide A by B  
Decimal adjust A  
DA A  
Logical Operations  
ANL A, Rn  
AND Register to A  
AND direct byte to A  
AND indirect RAM to A  
AND immediate to A  
AND A to direct byte  
AND immediate to direct byte  
OR Register to A  
OR direct byte to A  
OR indirect RAM to A  
OR immediate to A  
OR A to direct byte  
1
2
1
2
2
3
1
2
1
2
2
1
2
2
2
2
3
1
2
2
2
2
ANL A, direct  
ANL A, @Ri  
ANL A, #data  
ANL direct, A  
ANL direct, #data  
ORL A, Rn  
ORL A, direct  
ORL A, @Ri  
ORL A, #data  
ORL direct, A  
Rev. 0.3  
77  
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