C8051F50x-F51x
4.5. QFN-32 Package Specifications
Figure 4.9. QFN-32 Package Drawing
Table 4.9. QFN-32 Package Dimensions
Dimension
Min
Typ
Max
Dimension
Min
Typ
Max
A
0.80
0.00
0.18
0.9
0.02
1.00
0.05
0.30
E2
L
3.20
0.30
0.00
—
3.30
0.40
—
3.40
0.50
0.15
0.15
0.15
0.05
0.08
A1
b
0.25
L1
D
D2
5.00 BSC.
3.30
aaa
bbb
ddd
eee
—
3.20
3.40
—
—
e
0.50 BSC.
5.00 BSC.
—
—
E
—
—
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-220, variation VGGD except for
custom features D2, E2, and L which are toleranced per supplier designation.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
Components.
38
Rev. 1.1
SILICON [ SILICON ]
