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C8051F502-IM 参数 Datasheet PDF下载

C8051F502-IM图片预览
型号: C8051F502-IM
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路PC时钟
文件页数/大小: 312 页 / 2813 K
品牌: SILICON [ SILICON ]
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C8051F50x-F51x  
3. If the transfer was not successful, check the error register to determine the kind of error. Further error  
handling has to be done by the application.  
4. Set the RSTINT (LIN0CTRL.3) and RSTERR bits (LIN0CTRL.2) to reset the interrupt request and the  
error flags.  
21.4. LIN Slave Mode Operation  
When the device is configured for slave mode operation, it must wait for a command from a master node.  
Access from the firmware to the data buffer and ID registers of the LIN controller is only possible when a  
data request is pending (DTREQ bit (LIN0ST.4) is 1) and also when the LIN bus is not active (ACTIVE bit  
(LIN0ST.7) is set to 0).  
The LIN controller in slave mode detects the header of the message frame sent by the LIN master. If slave  
synchronization is enabled (autobaud), the slave synchronizes its internal bit time to the master bit time.  
The LIN controller configured for slave mode will generated an interrupt in one of three situations:  
1. After the reception of the IDENTIFIER FIELD  
2. When an error is detected  
3. When the message transfer is completed.  
The application should perform the following steps when an interrupt is detected:  
1. Check the status of the DTREQ bit (LIN0ST.4). This bit is set when the IDENTIFIER FIELD has been  
received.  
2. If DTREQ (LIN0ST.4) is set, read the identifier from LIN0ID and process it. If DTREQ (LIN0ST.4) is not  
set, continue to step 7.  
3. Set the TXRX bit (LIN0CTRL.5) to 1 if the current frame is a transmit operation for the slave and set to  
0 if the current frame is a receive operation for the slave.  
4. Load the data length into LIN0SIZE.  
5. For a slave transmit operation, load the data to transmit into the data buffer.  
6. Set the DTACK bit (LIN0CTRL.4). Continue to step 10.  
7. If DTREQ (LIN0ST.4) is not set, check the DONE bit (LIN0ST.0). The transmission was successful if the  
DONE bit is set.  
8. If the transmission was successful and the current frame was a receive operation for the slave, load the  
received data bytes from the data buffer.  
9. If the transmission was not successful, check LIN0ERR to determine the nature of the error. Further  
error handling has to be done by the application.  
10.Set the RSTINT (LIN0CTRL.3) and RSTERR bits (LIN0CTRL.2) to reset the interrupt request and the  
error flags.  
In addition to these steps, the application should be aware of the following:  
1. If the current frame is a transmit operation for the slave, steps 1 through 5 must be completed during  
the IN-FRAME RESPONSE SPACE. If it is not completed in time, a timeout will be detected by the  
master.  
2. If the current frame is a receive operation for the slave, steps 1 through 5 have to be finished until the  
reception of the first byte after the IDENTIFIER FIELD. Otherwise, the internal receive buffer of the LIN  
controller will be overwritten and a timeout error will be detected in the LIN controller.  
3. The LIN controller does not directly support LIN Version 1.3 Extended Frames. If the application detects  
an unknown identifier (e.g. extended identifier), it has to write a 1 to the STOP bit (LIN0CTRL.7) instead  
of setting the DTACK (LIN0CTRL.4) bit. At that time, steps 2 through 5 can then be skipped. In this  
situation, the LIN controller stops the processing of LIN communication until the next SYNC BREAK is  
received.  
206  
Rev. 1.1