C8051F360/1/2/3/4/5/6/7/8/9
Table 9.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
Address
SFR
Description
Page No.
Page
2
EMI0CF
EMI0CN
EMI0TC
FLKEY
0xC7
0xAA
0xF7
0xB7
0xB6
0xAC
0xB9
0x97
0x96
0xA8
0xB8
0xE4
0xD2
0xD3
0xD4
0xD5
0xA5
0xA4
0xF2
0xF1
0xD7
0xD6
0xAF
0xAE
0xCF
0xBF
0xB7
0xAD
0xB6
0x80
0xF4
F
EMIF Configuration
page 156
page 155
page 161
2
2
All Pages EMIF Control
F
0
0
F
EMIF Timing Control
Flash Lock and Key
page 142
page 143
page 152
FLSCL
Flash Scale
Flash Status
FLSTAT
IDA0CN
IDA0H
1
All Pages IDAC0 Control
page 65
1
All Pages IDAC0 High Byte
All Pages IDAC0 Low Byte
All Pages Interrupt Enable
All Pages Interrupt Priority
All Pages INT0/INT1 Configuration
page 65
1
IDA0L
page 66
IE
page 110
page 111
page 116
page 126
page 125
page 125
page 125
page 123
page 124
page 124
page 124
page 122
page 126
page 126
page 127
page 123
page 170
page 171
page 172
page 175
page 190
page 192
IP
IT01CF
MAC0ACC0
MAC0ACC1
MAC0ACC2
MAC0ACC3
MAC0AH
MAC0AL
MAC0BH
MAC0BL
MAC0CF
MAC0OVR
MAC0RNDH
MAC0RNDL
MAC0STA
OSCICL
OSCICN
OSCLCN
OSCXCN
P0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
F
F
F
MAC0 Accumulator Byte 0 (LSB)
MAC0 Accumulator Byte 1
MAC0 Accumulator Byte 2
MAC0 Accumulator Byte 3 (MSB)
MAC0 A Register High Byte
MAC0 A Register Low Byte
MAC0 B Register High Byte
MAC0 B Register Low Byte
MAC0 Configuration
MAC0 Accumulator Overflow
MAC0 Rounding Register High Byte
MAC0 Rounding Register Low Byte
MAC0 Status Register
Internal Oscillator Calibration
Internal Oscillator Control
Internal L-F Oscillator Control
External Oscillator Control
All Pages Port 0 Latch
Port 0 Mask
P0MASK
Notes:
0
1. Refers to a register in the C8051F360/1/2/6/7/8/9 only.
2. Refers to a register in the C8051F360/3 only.
98
Rev. 1.0
SILICON [ SILICON ]
