C8051F360/1/2/3/4/5/6/7/8/9
SFR Definition 6.3. IDA0L: IDA0 Data Word LSB
SFR Page:
all pages
SFR Address: 0x96
R/W
R/W
Bit6
R
R
R
R
R
R
Reset Value
—
Bit5
—
Bit4
—
Bit3
—
Bit2
—
Bit1
—
Bit0
00000000
Bit7
Bits 7–6: IDA0 Data Word Low-Order Bits.
Lower 2 bits of the 10-bit Data Word.
Bits 5–0: UNUSED. Read = 000000b, Write = don’t care.
Table 6.1. IDAC Electrical Characteristics
–40 to +85 °C, V
= 3.0 V Full-scale output current set to 2 mA unless otherwise specified.
DD
Parameter
Conditions
Min
Typ
Max
Units
Static Performance
Resolution
10
±0.5
±0.5
—
bits
LSB
LSB
Integral Nonlinearity
Differential Nonlinearity
Output Compliance Range
Offset Error
—
—
±2
±1
Guaranteed Monotonic
—
V
– 1.2
V
DD
—
0
—
15
—
—
LSB
Full Scale Error
2 mA Full Scale Output Current
–15
—
0
LSB
Full Scale Error Tempco
30
ppm/°C
µA/V
V
Power Supply
—
6.5
DD
Rejection Ratio
Dynamic Performance
Output Settling Time to 1/2
LSB
—
—
5
5
—
—
µs
µs
IDA0H:L = 0x3FF to 0x000
Startup Time
—
—
±1
±1
—
—
%
%
1 mA Full Scale Output Current
0.5 mA Full Scale Output Current
Gain Variation
Power Consumption
—
—
—
2140
1140
640
—
—
—
µA
µA
µA
2 mA Full Scale Output Current
1 mA Full Scale Output Current
0.5 mA Full Scale Output Current
Power Supply Current (V
supplied to IDAC)
DD
66
Rev. 1.0
SILICON [ SILICON ]
