C8051F360/1/2/3/4/5/6/7/8/9
SFR Definition 17.21. P3: Port3
SFR Page:
SFR Address: 0xB0
all pages
(bit addressable)
R/W
R/W
R/W
P3.5
Bit5
R/W
P3.4
Bit4
R/W
P3.3
Bit3
R/W
P3.2
Bit2
R/W
P3.1
Bit1
R/W
P3.0
Bit0
Reset Value
P3.7
Bit7
P3.6
Bit6
11111111
Bits 7–0: P3.[7:0]
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P3MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P3MDIN. Directly reads Port
pin when configured as digital input.
0: P3.n pin is logic low.
1: P3.n pin is logic high.
SFR Definition 17.22. P3MDIN: Port3 Input Mode
SFR Page:
F
SFR Address: 0xF4
R/W
R/W
Bit6
R/W
Bit5
R/W
Bit4
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Bit0
Reset Value
11111111
Bit7
Bits 7–0: Analog Input Configuration Bits for P3.7-P3.0 (respectively).
Port pins configured as analog inputs have their weak pullup, digital driver, and digital
receiver disabled.
0: Corresponding P3.n pin is configured as an analog input.
1: Corresponding P3.n pin is not configured as an analog input.
198
Rev. 1.0
SILICON [ SILICON ]
