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C8051F363 参数 Datasheet PDF下载

C8051F363图片预览
型号: C8051F363
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 288 页 / 2659 K
品牌: SILICON [ SILICON ]
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C8051F360/1/2/3/4/5/6/7/8/9  
SFR Definition 17.25. P4: Port4  
SFR Page:  
all pages  
SFR Address: 0xB5  
R
R/W  
R/W  
P4.5  
Bit5  
R/W  
P4.4  
Bit4  
R/W  
P4.3  
Bit3  
R/W  
P4.2  
Bit2  
R/W  
P4.1  
Bit1  
R/W  
P4.0  
Bit0  
Reset Value  
Bit7  
P4.6  
Bit6  
01111111  
Bit 7:  
UNUSED. Read = 0b. Write = don’t care.  
Bits 6–0: P4.[6:0]  
Write - Output appears on I/O pins per Crossbar Registers.  
0: Logic Low Output.  
1: Logic High Output (high impedance if corresponding P4MDOUT.n bit = 0).  
Read - Directly reads Port pin.  
0: P4.n pin is logic low.  
1: P4.n pin is logic high.  
SFR Definition 17.26. P4MDOUT: Port4 Output Mode  
SFR Page:  
F
SFR Address: 0xAE  
R
R/W  
R/W  
Bit5  
R/W  
Bit4  
R/W  
Bit3  
R/W  
Bit2  
R/W  
Bit1  
R/W  
Bit0  
Reset Value  
00000000  
Bit7  
Bit6  
Bit 7:  
UNUSED. Read = 0b. Write = don’t care.  
Bits 6–0: Output Configuration Bits for P4.6-P4.0 (respectively).  
0: Corresponding P4.n Output is open-drain.  
1: Corresponding P4.n Output is push-pull.  
200  
Rev. 1.0  
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