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C8051F363 参数 Datasheet PDF下载

C8051F363图片预览
型号: C8051F363
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 288 页 / 2659 K
品牌: SILICON [ SILICON ]
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C8051F360/1/2/3/4/5/6/7/8/9  
SFR Definition 16.2. OSCICN: Internal Oscillator Control  
SFR Page:  
F
SFR Address: 0xB7  
R/W  
R
R/W  
R
R/W  
R/W  
R/W  
R/W  
Reset Value  
IOSCEN  
IFRDY SUSPEND Reserved Reserved Reserved IFCN1  
IFCN0 11000000  
Bit7  
Bit6  
Bit5  
Bit4  
Bit3  
Bit2  
Bit1  
Bit0  
Bit 7:  
IOSCEN: Internal Oscillator Enable Bit.  
0: Internal Oscillator Disabled.  
1: Internal Oscillator Enabled.  
Bit 6:  
IFRDY: Internal Oscillator Frequency Ready Flag.  
0: Internal Oscillator not running at programmed frequency.  
1: Internal Oscillator running at programmed frequency.  
SUSPEND: Internal Oscillator Suspend Enable Bit.  
Bits 5:  
Setting this bit to logic ‘1’ places the internal oscillator in SUSPEND mode. The internal  
oscillator resumes operation when one of the SUSPEND mode awakening events occur.  
Bits 4–2: RESERVED. Read = 000b. Must Write 000b.  
Bits 1–0: IFCN1-0: Internal Oscillator Frequency Control Bits.  
00: Internal Oscillator is divided by 8. (default)  
01: Internal Oscillator is divided by 4.  
10: Internal Oscillator is divided by 2.  
11: Internal Oscillator is divided by 1.  
Table 16.1. Internal High Frequency Oscillator Electrical Characteristics  
–40°C to +85°C unless otherwise specified.  
Parameter  
Calibrated Internal Oscillator  
Frequency  
Conditions  
Min  
Typ  
Max  
Units  
24  
24.5  
25  
MHz  
Internal Oscillator Supply  
OSCICN.7 = 1  
450  
600  
µA  
Current (from V  
)
DD  
Power Supply Sensitivity  
Temperature Sensitivity  
External Clock Frequency  
Constant Temperature  
Constant Supply  
0
0.12  
60  
30  
%/V  
ppm/°C  
MHz  
T
(External Clock High Time)  
15  
ns  
XCH  
XCL  
T
(External Clock Low Time)  
15  
ns  
16.2. Programmable Internal Low-Frequency (L-F) Oscillator  
All C8051F36x devices include a programmable low-frequency internal oscillator, which is calibrated to a  
nominal frequency of 80 kHz. The low-frequency oscillator circuit includes a divider that can be changed to  
divide the clock by 1, 2, 4, or 8, using the OSCLD bits in the OSCLCN register (see SFR Definition 16.3).  
Additionally, the OSCLF bits (OSCLCN5:2) can be used to adjust the oscillator’s output frequency.  
Rev. 1.0  
171  
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