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S-80819CLNB-B6ET2G 参数 Datasheet PDF下载

S-80819CLNB-B6ET2G图片预览
型号: S-80819CLNB-B6ET2G
PDF下载: 下载PDF文件 查看货源
内容描述: 超小型高精度电压检测器 [SUPER-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR]
分类和应用:
文件页数/大小: 58 页 / 702 K
品牌: SII [ SEIKO INSTRUMENTS INC ]
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SUPER-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR  
S-808xxC Series  
Rev.4.3_00  
VDD  
VDD  
Detection voltage  
Release voltage  
+VDET) Max.  
(
VDET) Max.  
VDET) Min.  
(
Detection voltage range  
Release voltage range  
(
(
+VDET) Min.  
OUT  
OUT  
Figure 21 Detection Voltage (CMOS Output Products)  
Figure 22 Release Voltage (CMOS Output Products)  
Remark Although the detection voltage and release voltage overlap in the range of 1.514 V to 1.530 V,  
+VDET is always larger than VDET  
2. Hysteresis Width (VHYS  
.
)
The hysteresis width is the voltage difference between the detection voltage and the release voltage (The  
voltage at point B The voltage at point A =VHYS in Figure 18). The existence of the hysteresis width  
prevents malfunction caused by noise on input signal.  
3. Through-type Current  
The through-type current refers to the current that flows instantaneously at the time of detection and release  
of a voltage detector. The through-type current is large in CMOS output products, small in Nch open-drain  
output products.  
4. Oscillation  
In applications where a resistor is connected to the voltage detector input (Figure 23), taking a CMOS active  
low product for example, the through-type current which is generated when the output goes from low to high  
(release) causes a voltage drop equal to [through-type current]×[input resistance] across the resistor. When  
the input voltage drops below the detection voltage (VDET) as a result, the output voltage goes to low level.  
In this state, the through-type current stops and its resultant voltage drop disappears, and the output goes  
from low to high. A through-type current is again generated, a voltage drop appears, and repeating the  
process finally induces oscillation.  
VDD  
RA  
VIN  
S-808xxCL  
OUT  
RB  
VSS  
Figure 23 An Example for Bad Implementation of Input Voltage Divider  
Seiko Instruments Inc.  
25  
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