SAB 82525
SAB 82526
SAF 82525
SAF 82526
Pin Definitions and Functions (cont’d)
Pin No.
Symbol
Input (I)
Function
Output (O)
P-LCC P-MQFP
40
38
1
43
DRQTA O
DRQTB
DMA Request Transmitter (channel A/channel B)
The transmitter of the HSCX requests a DMA data transfer
by activating this line.
The DRQTn remains high as long as the transmit FIFO
requires data transfers.
The amount of data bytes to be transferred from system
memory to the HSCX (= byte count) must be written first to
the XBCH, XBCL registers.
Always blocks of data (n x 32 bytes + REST, n = 0, 1,…)
are transferred till the byte count is reached.
DRQTn is deactivated immediately following the falling
edge of the last WR cycle.
41
2
VDD
I
Power supply + 5 V.
Semiconductor Group
15