SAB 82525
SAB 82526
SAF 82525
SAF 82526
HSCX with SAB 80188 Microprocessor
A system with minimized additional hardware expense can be with a SAB 80188
microprocessor as shown in figure 4.
+5 V
INTn
PSCn
CS
INT
IM1
Serial
Channel A
DRQ0
DRQTA
DRQ1
DRQRA
DACKA
ALE
SAB 80188
CPU
SAB 82525
HSCX
Serial
Channel B
+5 V
DACKB
A8 - A15
AD0 - AD7
A0 - A6
D0 - D7
Latches
Transceiver
System Bus
A0-A6
D0-D7
System
Memory
ITS00949
Figure 4
HSCX with SAB 80188 CPU
The HSCX is connected to the demultiplexed system bus. Data transfer for one serial channel
can be done by the 2-channel on-chip DMA controller of the SAB 80188, the other channel is
serviced by interrupt. Since the SAB 80188 does not provide DMA acknowledge outputs, data
transfer from/to HSCX is controlled via CS, RD or WR address information (A0 … A6) and the
DACKA, DACKB inputs are not used.
This solution supports applications with a high speed data rate in one serial channel with
minimum hardware expense making use of the on-chip peripheral functions of the SAB 80188
(chip select logic, interrupt controller, DMA controller).
Semiconductor Group
19
SIEMENS [ Siemens Semiconductor Group ]
