SX1231
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Notes - the accuracy of the typical timings given in Table 15 will depend in the RC oscillator calibration
- RC oscillator calibration is required, and must be performed at power up. See section 7.3 for details
- the default ListenResol setting 1001 is reserved
The criteria taken for detecting a wanted signal and hence deciding to maintain the receiver on is defined by ListenCriteria
in RegListen1.
Table 16 Signal Acceptance Criteria in Listen Mode
ListenCriteria
Input Signal Power
SyncAddressMatch
>= RssiThreshold
0
1
Required
Required
Not Required
Required
The action taken after detection of a packet, is defined by ListenEnd in RegListen3, as described in the table below.
Table 17 End of Listen Cycle Actions
ListenEnd
Description
Chip stays in Rx mode. Listen mode stops and must be disabled.
00
01
Chip stays in Rx mode until PayloadReady or Timeout interrupt occurs. It then goes to the
mode defined by Mode. Listen mode stops and must be disabled.
Chip stays in Rx mode until PayloadReady or Timeout interrupt occurs. Listen mode then
10
resumes in Idle state. FIFO content is lost at next Rx wakeup.
Rev 2 - Nov 2009
Page 38
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