LA6560
Pin Functions
Pin No.
1
Symbol
FWD
Pin descriptions
Output change pin (FWD) for 5CH (VLO), logic input for loading block.
Output change pin (REV) for 5CH (VLO), logic input for loading block.
Power supply for CH3, 4, and 5.
2
REV
3
V
2
CC
4
VLO-
Loading output (-)
5
VLO+
Loading output (+)
6
V
4+
Output pin (+) for channel 4
O
7
V
4-
Output pin (-) for channel 4
O
8
V
3+
3-
Output pin (+) for channel 3
O
9
V
Output pin (-) for channel 3
O
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
2+
2-
Output pin (+) for channel 2
O
V
V
Output pin (-) for channel 2
O
1+
Output pin (+) for channel 1
O
V
V
1-
Output pin (-) for channel 1
O
1
Power supply for CH1, 2 (BTL).
CC
V
1
Input pin for channel 1
IN
1-A
V
OP-AMP input AMP-A input pin (-)
OP-AMP input AMP-A input pin (+)
Input AMP-B input pin (-) for channel 1
Input AMP-B input pin (+) for channel 1
Input pin for channel 2, input AMP output
Input pin (-) for channel 2
IN
V
1+A
IN
V
1-B
IN
V
1+B
IN
V
2
IN
V
2-
IN
V
2+
3
Input pin (+) for channel 2
IN
V
Input pin for channel 3, input AMP output
Input pin (-) for channel 3
IN
V
3-
IN
V
3+
Input pin (+) for channel 3
IN
REG-IN
PNP transistor base connected
REG-OUT
5V power output to which the PNP transistor collector connected.
CH1 reference voltage output. Outputs internal VREF (2.5V : TYP) or external VREF.
Pin for changeover between input AMP-A/internal VREF (TYP2.5V) and input AMP-B/ external VREF.
Reference voltage applied pin
VREF-OUT
V 1 (VREF) -SW
IN
29
30
31
32
33
34
35
36
VREF-IN
V
4+
4-
Input pin (+) for channel 4
IN
V
Input pin (-) for channel 4
IN
V
4
Input pin for channel 4, input AMP output
All BTL AMP output ON/OFF
IN
MUTE
VCONT
S-GND
LOADING output voltage setting
Signal system GND
Note : Center frame (FR) becomes GND for the power system (P-GND). Set this to the minimum potential together with S-GND.
No.A0599-5/9
SANYO [ SANYO SEMICON DEVICE ]
