INSTRUCTION SET
S3C4510B
THE CONDITION FIELD
In ARM state, all instructions are conditionally executed according to the state of the CPSR condition codes and
the instruction¢s condition field. This field (bits 31:28) determines the circumstances under which an instruction is
to be executed. If the state of the C, N, Z and V flags fulfils the conditions encoded by the field, the instruction is
executed, otherwise it is ignored.
There are sixteen possible conditions, each represented by a two-character suffix that can be appended to the
instruction¢s mnemonic. For example, a branch (B in assembly language) becomes BEQ for "Branch if "Equal",
which means the branch will only be taken if the Z flag is set.
In practice, fifteen different conditions may be used: these are listed in Table 3-2. The sixteenth (1111) is
reserved, and must not be used.
In the absence of a suffix, the condition field of most instructions is set to “Always" (suffix AL). This means the
instruction will always be executed regardless of the CPSR condition codes.
Table 3-2. Condition Code Summary
Code
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
Suffix
EQ
NE
CS
CC
MI
Flags
Meaning
Z set
Equal
Z clear
C set
Not equal
Unsigned higher or same
Unsigned lower
Negative
C clear
N set
PL
N clear
V set
Positive or zero
Overflow
VS
VC
HI
V clear
No overflow
C set and Z clear
C clear or Z set
Unsigned higher
Unsigned lower or same
Greater or equal
Less than
LS
GE
LT
N equals V
N not equal to V
Z clear AND (N equals V)
Z set OR (N not equal to V)
(Ignored)
GT
LE
Greater than
Less than or equal
Always
AL
3-4
SAMSUNG [ SAMSUNG ]
