OneNAND512Mb(KFG1216U2B-xIB6)
FLASH MEMORY
2.4
Pin Description
Pin Name
Type
Nameand Description
Host Interface
Address Inputs
A15~A0
I
- Inputs for addresses during read and write operation, which are for addressing
BufferRAM & Register.
Data Inputs/Outputs
- Inputs data during program and commands for all operations, outputs data during memory array/
register read cycles.
Data pins float to high-impedance when the chip is deselected or outputs are disabled.
DQ15~DQ0
INT
I/O
Interrupt
O
Notifies the Host when a command is completed. After power-up, it is at hi-z condition. Once IOBE is set
to 1, it does not float to hi-z condition even when CE is disabled or OE is disabled.
Ready
RDY
CLK
WE
O
I
Indicates data valid in synchronous read modes and is activated while CE is low
Clock
CLK synchronizes the device to the system bus frequency in synchronous read mode.
The first rising edge of CLK in conjunction with AVD low latches address input.
Write Enable
I
WE controls writes to the bufferRAM and registers. Datas are latched on the WE pulse’s rising edge
Address Valid Detect
IIndicates valid address presence on address inputs. During asynchronous read operation, all addresses are valid
while AVD is low, and during synchronous read operation, all addresses are latched on CLK’s rising edge while AVD is
held low for one clock cycle.
> Low : for asynchronous mode, indicates valid address; for burst mode, causes starting address to be latched on rising
edge on CLK
AVD
I
I
> High : device ignores address inputs
Reset Pin
RP
CE
When low, RP resets internal operation of OneNAND. RP status is don’t care during power-up
and bootloading. When high, RP level must be equivalent to Vcc-IO / Vccq level.
Chip Enable
I
I
CE-low activates internal control logic, and CE-high deselects the device, places it in standby state,
and places DQ in Hi-Z.
Output Enable
OE
OE-low enables the device’s output data buffers during a read cycle.
Power Supply
VCC-Core
/ Vcc
Power for OneNAND Core
This is the power supply for OneNAND Core.
Power for OneNAND I/O
This is the power supply for OneNAND I/O
Vcc-IO / Vccq is internally separated from Vcc-Core / Vcc.
VCC-IO
/ Vccq
VSS
Ground for OneNAND
etc.
Do Not Use
DNU
NC
Leave it disconnected. These pins are used for testing.
No Connection
Lead is not internally connected.
NOTE: Do not leave power supply(Vcc-Core/Vcc-IO, VSS) disconnected.
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