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K9K1208D0C 参数 Datasheet PDF下载

K9K1208D0C图片预览
型号: K9K1208D0C
PDF下载: 下载PDF文件 查看货源
内容描述: 64M ×8位, 32M x 16位NAND闪存 [64M x 8 Bit , 32M x 16 Bit NAND Flash Memory]
分类和应用: 闪存
文件页数/大小: 39 页 / 955 K
品牌: SAMSUNG [ SAMSUNG ]
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K9K1208Q0C  
K9K1208D0C  
K9K1208U0C  
K9K1216Q0C  
K9K1216D0C  
K9K1216U0C  
FLASH MEMORY  
READ ID  
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of  
00h. Two read cycles sequentially output the manufacture code(ECh), and the device code respectively. The command register  
remains in Read ID mode until further commands are issued to it. Figure 13 shows the operation sequence.  
Figure 13. Read ID Operation  
CLE  
tCEA  
CE  
WE  
tAR  
ALE  
RE  
tWHR1  
tREA  
Device  
Code*  
I/Ox  
ECh  
00h  
90h  
Address. 1cycle  
Maker code  
Device code  
Device  
Device Code*  
K9K1208Q0C  
36h  
76h  
K9K1208D0C  
K9K1208U0C  
K9K1216Q0C  
76h  
XX46h  
K9K1216D0C  
K9K1216U0C  
XX56h  
XX56h  
RESET  
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random  
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no  
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and  
the Status Register is cleared to value C0h when WP is high. Refer to table 5 for device status after reset operation. If the device is  
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST  
after the Reset command is written. Refer to Figure 14 below.  
Figure 14. RESET Operation  
tRST  
R/B  
I/Ox  
FFh  
Table5. Device Status  
After Power-up  
After Reset  
Operation Mode  
Read 1  
Waiting for next command  
31  
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