AFE FOR CCD/CIS SIGNAL PROCESSOR
BL8531H
Table: MPU Port Map Format
A0
A2
0
A1
0
Register
0
1
0
1
0
1
0
1
Configuration Register
Input Offset register
0
0
0
1
PGA Gain Control Register
CIS Clamp Control Register
Reserved
0
1
1
0
1
0
Reserved
1
1
Reserved
1
1
Reserved
2) Register Overview
The MPU port map is accessed through pins A0, A1 and A2. See MPU port map format.(previous page)
Configuration Register
Bit 7
Bit 6
Bit 5
PGA Gain
mode
Bit 4
Bit 3
Bit 2
Bit 1
Single
Bit 0
CDS
Clamp
mode
select1
Clamp
mode
select0
External
Reference
Color1
Color0
Channel
Enable
Single Channel Color Pointer
Bit3
0
Bit2
0
Color
Red
0
1
Green
Blue
1
0
1
1
Reserved
Clamp Mode Selection
Bit7
0
Bit6
0
Clamp Mode
Line Clamp
Pixel Clamp
No Clamp
Reserved
0
1
1
0
1
1
16
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