BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
FUNCTIONAL DESCRIPTION
1) 3-Channel Operation with CDS
This mode enables simultaneous sampling of a triple output CCD. The CCD waveforms are ac coupled to the
VINR, VING and VINB pins where they are automatically biased at an appropriate voltage using the on-chip
clamp. The internal CDSs take two samples of the incoming pixel data; the first samples are taken during the
reset time while the second samples are taken during data portion of the input pixels. When STRTLN is low, the
internal circuitry is reset on the next rising edge of ADCCLK; the multiplexer is switched to red channel.
2) 3-Channel SHA Operation
This mode enables simultaneous sampling of a triple output CIS or something like that. The CDS functions are
replaced with the sample and hold amplifiers. The input waveforms are either dc coupled or dc restored to
the VINR, VING and VINB pins. The input reference voltage in this mode will be defined by clamp level control
register.
When STRTLN is low, the internal circuitry is reset on the next rising edge of ADCCLK; the multiplexer is
switched to red channel.
3) 1-Channel Operation with CDS
This mode enables single channel or monochrome sampling. The CCD waveforms are ac coupled to the analog
input pin where they are automatically biased at an appropriate voltage using the on-chip clamp.
Bit2 and bit3 in configuration register select the desired input among red, green and blue.
4) 1-Channel SHA Operation
This mode enables single-channel or monochrome sampling. The CDS function is replaced with the sample and
hold amplifier.
The input waveforms are either dc coupled or dc restored to the analog input pin. The input reference voltage in
this mode will be defined by clamp level control register.
Bit2 and bit2 in configuration register select the desired input among red, green and blue.
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