STB/P432S
S a mHop Microelectronics C orp.
Ver 1.0
N-Channel Logic Enhancement Mode Field Effect Transistor
PRODUCT SUMMARY
V
DSS
40V
FEATURES
Super high dense cell design for extremely low RDS(ON).
High power and current handling capability.
TO-220 & TO-263 package.
I
D
60A
R
DS(ON)
(m
Ω
) Max
9
@
VGS=10V
11
@
VGS=4.5V
D
G
S
G
D
S
S TB S E R IE S
TO-263(DD-P AK)
S TP S E R IE S
TO-220
ABSOLUTE MAXIMUM RATINGS (
T
C
=25
°
C unless otherwise noted
)
Symbol
V
DS
V
GS
I
D
I
DM
E
AS
P
D
T
J,
T
STG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
b
a
Limit
40
±20
T
C
=25°C
60
240
130
T
C
=25°C
62.5
-55 to 150
Units
V
V
A
A
mJ
W
°C
-Pulsed
Sigle Pulse Avalanche Energy
d
Maximum Power Dissipation
a
Operating Junction and Storage
Temperature Range
THERMAL CHARACTERISTICS
R
JC
Thermal Resistance, Junction-to-Case
R
JA
Thermal Resistance, Junction-to-Ambient
2
50
°C/W
°C/W
Details are subject to change without notice.
Jun,24,2008
1
www.samhop.com.tw
SAMHOP [ SAMHOP MICROELECTRONICS CORP. ]
