S T A6610
S amHop Microelectronics C orp.
Nov.24 2006
Dual N-C hannel E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
V
DS S
30V
F E AT UR E S
S uper high dense cell design for low R
DS (ON
).
I
D
7.6A
R
DS (ON) ( m
Ω
) Max
23 @ V
G S
= 10V
35 @ V
G S
= 4.5V
R ugged and reliable.
S urface Mount P ackage.
E S D P rotected.
D
1
8
D
1
7
D
2
6
D
2
5
P DIP -8
1
1
2
3
4
S
1
G
1
S
2
G
2
ABS OLUTE MAXIMUM R ATINGS (T
A
=25 C unless otherwise noted)
P arameter
Drain-S ource Voltage
G ate-S ource Voltage
Drain C urrent-C ontinuous @ T a
-P ulsed
b
a
S ymbol
V
DS
V
GS
25 C
70 C
I
DM
I
S
P
D
T a=70 C
T
J
, T
S TG
I
D
N-Channel
30
20
7.6
6
30
1.7
3
2
-55 to 150
Unit
V
V
A
A
A
A
W
C
Drain-S ource Diode F orward C urrent
a
Maximum P ower Dissipation
Operating J unction and S torage
Temperature R ange
a
T a= 25 C
THE R MAL C HAR AC TE R IS TIC S
Thermal R esistance, Junction-to-Ambient
a
R
JA
41.5
C /W
1