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BD9A300MUV 参数 Datasheet PDF下载

BD9A300MUV图片预览
型号: BD9A300MUV
PDF下载: 下载PDF文件 查看货源
内容描述: [BD9A300MUV是内置低导通电阻的功率MOSFET的同步整流降压型开关稳压器。最大可输出3A的电流。凭借SLLM™控制,实现轻负载状态的良好效率特性,适用于要降低待机功耗的设备。振荡频率1MHz的高速产品,适用于小型电感。是电流模式控制DC/DC转换器,具有高速瞬态响应性能,可轻松设定相位补偿。]
分类和应用: 开关转换器稳压器
文件页数/大小: 35 页 / 2747 K
品牌: ROHM [ ROHM ]
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BD9A300MUV  
Operational Notes continued  
11. Unused Input Pins  
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and  
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small  
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and  
cause unexpected operation of the IC. So, unless otherwise specified, unused input pins should be connected to the  
power supply or ground line.  
12. Regarding the Input Pin of the IC  
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them  
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a  
parasitic diode or transistor. For example (refer to figure below):  
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.  
When GND > Pin B, the P-N junction operates as a parasitic transistor.  
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual  
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to  
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should  
be avoided.  
Resistor  
Transistor (NPN)  
Pin A  
Pin B  
Pin B  
B
E
C
Pin A  
B
C
E
P
P+  
P+  
N
P+  
P
P+  
N
N
N
N
N
N
N
Parasitic  
Elements  
Parasitic  
Elements  
P Substrate  
GND GND  
P Substrate  
GND  
GND  
Parasitic  
Elements  
Parasitic  
Elements  
N Region  
close-by  
Figure 57. Example of monolithic IC structure  
13. Ceramic Capacitor  
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with  
temperature and the decrease in nominal capacitance due to DC bias and others.  
14. Area of Safe Operation (ASO)  
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe  
Operation (ASO).  
15. Thermal Shutdown Circuit(TSD)  
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always  
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction  
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below  
the TSD threshold, the circuits are automatically restored to normal operation.  
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no  
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from  
heat damage.  
16. Over Current Protection Circuit (OCP)  
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This  
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should  
not be used in applications characterized by continuous operation or transitioning of the protection circuit.  
www.rohm.com  
TSZ02201-0J3J0AJ00350-1-2  
30.Jun.2017 Rev.003  
© 2013 ROHM Co., Ltd. All rights reserved.  
29/32  
TSZ2211115001  
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