RT5735
Register
Name
Register
Address
b[7]
(MSB)
b[0]
(LSB)
b[6]
b[5]
b[4]
b[3]
b[2]
b[1]
Meaning
PRODUCT_ID
PRODUCT
0x03 Default
Read/Write
0
0
0
1
0
0
0
0
_ID
R
R
R
R
R
R
R
R
PRODUCT_ID
PRODUCT_ID
Register
Name
Register
Address
b[7]
(MSB)
b[0]
(LSB)
b[6]
b[5]
b[4]
b[3]
b[2]
b[1]
Meaning
REVISION_ID
REVISION
_ID
0x04 Default
Read/Write
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
REVISION_ID
REVISION_ID
Register
Name
Register
Address
b[7]
(MSB)
b[0]
(LSB)
b[6]
b[5]
b[4]
b[3]
b[2]
b[1]
Meaning
0x05 Default
Read/Write
FEATURE_ID
FEATURE_
ID
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
FEATURE_ID
FEATURE_ID
Register
Name
Register
Address
b[7]
(MSB)
b[0]
(LSB)
b[6]
b[5]
b[4]
b[3]
b[2]
b[1]
Meaning
RESV
VENDER
ID
0x06 Default
Read/Write
1
0
0
0
1
0
0
0
R
R
R
R
R
R
R
R
VENDER ID
VENDER ID
Register
Name
Register
Address
b[7]
(MSB)
b[0]
(LSB)
b[6]
b[5]
b[4]
b[3]
b[2]
b[1]
Meaning ENVSEL1
Vout_VSEL1[6:0]
PROGVSE
L1
0x10 Default
Read/Write
1
1
0
1
0
0
0
0
RW
RW
RW
RW
RW
RW
RW
RW
EN Pin Gating for VSEL internal signal = High
ENVSEL1
0 : Disabled
1 : Enabled
VID Table satisfy :
SEL[6:0] = 1111111 : VOUT = 1393.75mV
…
Vout_VSEL1[6:0]
SEL[6:0] = 1010000: VOUT = 1.1V (default)
…
SEL[6:0] = 0000000 :0.6V
6.25mV step for DCDC, VOUT = 600mV + 6.25mV x SEL
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation
www.richtek.com
16
DS5735-00 August 2014