RT3669EA
Table 3. SET1 Pin Setting for GFX Controller QR Threshold
SET1 Pin Setting Voltage
Min
829.28
1034.64
1137.32
Typical
850
1050
1150
R
R
D
V
SET1_IR
�½
80μ
U
R
U
R
D
Max
870.72
1065.36
1162.68
Unit
mV
mV
mV
QR Threshold
(GFX)
Disable
20mV
25mV
Table 4. TSEN Pin Setting for GFX Controller Frequency, Initial Offset and PHOCP Setting Ratio
TSEN Pin Setting Voltage
Min
6.75
57.25
208.75
259.25
410.75
461.25
612.75
663.25
814.75
865.25
1016.75
1067.25
1218.75
1269.25
1420.75
1471.25
Typical
25
75
225
275
425
475
625
675
825
875
1025
1075
1225
1275
1425
1475
R
D
V
TSEN_DIV
�½
3.2
R
U
R
D
Max
43.25
92.75
241.25
290.75
439.25
488.75
637.25
686.75
835.25
884.75
1033.25
1082.75
1231.25
1280.75
1429.25
1478.75
Unit
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
Frequency
(GFX)
Initial Offset
(GFX)
GFX PHOCP
Setting Ratio
(Percentage of
OCP_SPIKE)
150%
200%
150%
200%
150%
200%
150%
200%
150%
200%
150%
200%
150%
200%
150%
200%
25mV
0mV
300kHz
25mV
50mV
25mV
0mV
400kHz
25mV
50mV
(M : Phase Number)
PHOCP_TH = OCP_SPIKE × (PHOCP Setting Ratio) / M
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
8
DS3669EA-06
August 2019
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
