RT3669EA
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
EN and Logic Inputs
V
V
I
2
--
--
--
--
--
--
--
0.8
1
IH_EN
EN Threshold
V
A
%
IL_EN
Leakage Current of EN
SVC, SVD, PWROK
1
70
0
LEK_EN
V
Respect to VDDIO
Respect to VDDIO
100
35
IH_SVI
IH_SVI
V
V
Hysteresis of SVC, SVD,
PWROK
Respect to VDDIO
10
--
--
%
HYS_SVI
SVC
SVI2 Bus
SVC Frequency
f
(Note 5)
0.1
--
30
MHz
Thermal Management
VRHOT Indicator Threshold
VRHOT Indicator Hysteresis
TON Setting
V
V
2.16
50
2.2
75
2.24
100
V
TH_VRHOT
mV
HYS_VRHOT
V
IN
= 19V,V
= 1V,
DAC
On-Time Setting
t
t
[PSI0_L:PSI1_L]=00
(Note 6)
150
--
175
250
200
400
ns
ns
ON
Minimum Off Time
ITSEN
V = 1V
DAC
OFF
TSEN Source Current
Protection
I
V = 5V
CC
--
80
--
A
TSEN
Under Voltage Lockout
Threshold
V
VCC falling edge
3.9
--
4.1
200
1.85
1
4.3
--
V
mV
V
UVLO
Under Voltage Lockout
Hysteresis
V
UVLO
Over Voltage Protection
Threshold
V
t
1.8
1.9
3
OVP
VSEN rising above
threshold
Delay of OVP
0.3
s
mV
s
A
OVP
Under Voltage Protection
Threshold
V
Respect to VID voltage
600
0.5
500
3
400
7
UVP
UVP
VSEN falling below
threshold
Delay of UVP
t
DCR = 1.1m,
RIMON = 7.95k
OCP_SPIKE Threshold
OCP_SPIKE Trigger Delay
I
t
46.55
49
51.45
OCP_SPIKE
OCPSPIKE
8
14
20
1
s
s
_DLY
Delay of Per Phase OCP
t
0.1
0.5
PHOCP
VRHOT_L and PGOOD
Output Low Voltage at
VRHOT_L
V
t
I
= 4mA
0
2
--
--
0.2
--
V
VRHOT_L
VRHOT_L
VRHOT_L Assertion Time
s
VRHOTL
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3669EA-06 August 2019
www.richtek.com
11
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