RX62N Group, RX621 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (24 / 35)
Module
Register
Number Access
Number of
Address
Abbreviation Register Name
Abbreviation of Bits
Size
Access Cycles
0008 8C05h
0008 8C06h
0008 8C08h
0008 8C0Ah
0008 8C80h
0008 8C82h
0008 8C84h
0008 8C86h
0008 8C90h
0008 8C92h
0008 8C94h
0008 8C96h
0008 8CA0h
0008 8CA2h
0008 8CA4h
0008 8CA6h
0008 8CB2h
0008 8CB4h
0008 8CB6h
0008 9000h
0008 9004h
0008 9008h
MTU8
Timer status register
TSR
8
8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
MTU8
Timer counter
TCNT
16
16
16
16
16
8
16
16
16
16
16
8
MTU8
Timer general register A
Timer general register B
Timer counter U
TGRA
MTU8
TGRB
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
MTU11
S12AD
S12AD
S12AD
TCNTU
TGRU
Timer general register U
Timer control register U
Timer I/O control register U
Timer counter V
TCRU
TIORU
TCNTV
TGRV
8
8
16
16
8
16
16
8
Timer general register V
Timer control register V
Timer I/O control register V
Timer counter W
TCRV
TIORV
TCNTW
TGRW
TCRW
TIORW
TIER
8
8
16
16
8
16
16
8
Timer general register W
Timer control register W
Timer I/O control register W
Timer interrupt enable register
Timer start register
8
8
8
8
TSTR
8
8
Timer compare match clear register
A/D control register
TCNTCMPCLR
ADCSR
ADANS
ADADS
8
8
8
8
A/D channel select register
16
16
16
16
A/D-converted value addition mode
select register
0008 900Ch
S12AD
A/D-converted value addition count
select register
ADADC
8
8
2 to 3 PCLK*8
0008 900Eh
0008 9010h
0008 9020h
0008 9022h
0008 9024h
0008 9026h
0008 9028h
0008 902Ah
0008 902Ch
0008 902Eh
0008 C000h
0008 C001h
0008 C002h
0008 C003h
0008 C004h
0008 C005h
0008 C006h
0008 C007h
0008 C008h
0008 C009h
S12AD
S12AD
S12AD
S12AD
S12AD
S12AD
S12AD
S12AD
S12AD
S12AD
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT8
PORT9
A/D control extended register
A/D start trigger select register
A/D data register 0
ADCER
ADSTRGR
ADDR0
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
ADDR6
ADDR7
DDR
16
8
16
8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
16
16
16
16
16
16
16
16
8
16
16
16
16
16
16
16
16
8
A/D data register 1
A/D data register 2
A/D data register 3
A/D data register 4
A/D data register 5
A/D data register 6
A/D data register 7
Data direction register
Data direction register
Data direction register
Data direction register
Data direction register
Data direction register
Data direction register
Data direction register
Data direction register
Data direction register
DDR
8
8
DDR
8
8
DDR
8
8
DDR
8
8
DDR
8
8
DDR*6*7
DDR*6*7
DDR*6*7
DDR*6*7
8
8
8
8
8
8
8
8
R01DS0052EJ0110 Rev.1.10
Feb 10, 2011
Page 75 of 146
RENESAS [ RENESAS TECHNOLOGY CORP ]
