RX62N Group, RX621 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (22 / 35)
Module
Register
Number Access
Number of
Address
Abbreviation Register Name
Abbreviation of Bits
Size
16
16
16
16
16
8
Access Cycles
0008 8900h
0008 8902h
0008 8904h
0008 8906h
0008 8908h
0008 890Ah
0008 890Bh
0008 890Ch
0008 890Eh
0008 8A00h
0008 8A01h
0008 8A02h
0008 8A03h
0008 8A04h
0008 8A05h
0008 8A06h
0008 8A07h
0008 8A08h
0008 8A09h
0008 8A0Ah
0008 8A0Dh
0008 8A0Eh
0008 8A0Fh
0008 8A10h
0008 8A12h
0008 8A14h
0008 8A16h
0008 8A18h
0008 8A1Ah
0008 8A1Ch
0008 8A1Eh
0008 8A20h
0008 8A22h
0008 8A24h
0008 8A26h
0008 8A28h
0008 8A2Ah
0008 8A2Ch
0008 8A2Dh
0008 8A30h
0008 8A31h
0008 8A32h
0008 8A34h
0008 8A36h
POE
Input level control/status register 1
ICSR1
OCSR1
ICSR2
OCSR2
ICSR3
SPOER
POECR1
POECR2
ICSR4
TCR
16
16
16
16
16
8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
POE
Output level control/status register 1
Input level control/status register 2
Output level control/status register 2
Input level control/status register 3
Software port output enable register
Port output enable control register 1
Port output enable control register 2
Input level control/status register 4
Timer control register
POE
POE
POE
POE
POE
8
8
POE
16
16
8
16
16
8
POE
MTU9
MTU10
MTU9
MTU10
MTU9
MTU9
MTU10
MTU10
MTU9
MTU10
MTUB
MTUB
MTUB
MTUB
MTU9
MTU10
MTUB
MTUB
MTU9
MTU9
MTU10
MTU10
MTUB
MTUB
MTU9
MTU9
MTU10
MTU10
MTU9
MTU10
MTUB
MTUB
MTUB
MTUB
MTUB
Timer control register
TCR
8
8
Timer mode register
TMDR
TMDR
TIORH
TIORL
TIORH
TIORL
TIER
8
8
Timer mode register
8
8
Timer I/O control register H
Timer I/O control register L
Timer I/O control register H
Timer I/O control register L
Timer interrupt enable register
Timer interrupt enable register
Timer output master enable register
Timer gate control register
Timer output control register 1
Timer output control register 2
Timer counter
8
8
8
8
8
8
8
8
8
8
TIER
8
8
TOER
TGCR
TOCR1
TOCR2
TCNT
TCNT
TCDR
TDDR
TGRA
TGRB
TGRA
TGRB
TCNTS
TCBR
TGRC
TGRD
TGRC
TGRD
TSR
8
8
8
8
8
8
8
8
16
16
16
16
16
16
16
16
16
16
16
16
16
16
8
16
16
16
16
16
16
16
16
16
16
16
16
16
16
8
Timer counter
Timer cycle data register
Timer dead time data register
Timer general register A
Timer general register B
Timer general register A
Timer general register B
Timer subcounter
MTUB Timer cycle buffer register
Timer general register C
Timer general register D
Timer general register C
Timer general register D
Timer status register
Timer status register
TSR
8
8
Timer interrupt skipping set register
Timer interrupt skipping counter
TUB Timer dead time enable register
Timer dead time enable register
Timer output level buffer register
TITCR
TITCNT
TBTER
TDER
TOLBR
8
8
8
8
8
8
8
8
8
8
R01DS0052EJ0110 Rev.1.10
Feb 10, 2011
Page 73 of 146
RENESAS [ RENESAS TECHNOLOGY CORP ]
