RX62N Group, RX621 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (18 / 35)
Module
Register
Number Access
Number of
Address
Abbreviation Register Name
Abbreviation of Bits
Size
Access Cycles
0008 8302h
0008 8303h
0008 8304h
0008 8305h
0008 8306h
0008 8307h
0008 8308h
0008 8309h
0008 830Ah
0008 830Bh
0008 830Ch
0008 830Dh
0008 830Eh
0008 830Fh
0008 8310h
0008 8311h
0008 8312h
0008 8313h
0008 8320h
0008 8321h
0008 8322h
0008 8323h
0008 8324h
0008 8325h
0008 8326h
0008 8327h
0008 8328h
0008 8329h
0008 832Ah
0008 832Bh
0008 832Ch
0008 832Dh
0008 832Eh
0008 832Fh
0008 8330h
0008 8331h
0008 8332h
0008 8333h
0008 8380h
0008 8381h
0008 8382h
0008 8383h
0008 8384h
0008 8388h
0008 8389h
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
I2C bus mode register 1
ICMR1
ICMR2
ICMR3
ICFER
ICSER
ICIER
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
32
8
8
8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
I2C bus mode register 2
8
I2C bus mode register 3
8
I2C bus function enable register
I2C bus status enable register
I2C bus interrupt enable register
I2C bus status register 1
8
8
8
ICSR1
ICSR2
SARL0
SARU0
SARL1
SARU1
SARL2
SARU2
ICBRL
ICBRH
ICDRT
ICDRR
ICCR1
ICCR2
ICMR1
ICMR2
ICMR3
ICFER
ICSER
ICIER
8
I2C bus status register 2
8
Slave address register L0
Slave address register U0
Slave address register L1
Slave address register U1
Slave address register L2
Slave address register U2
I2C bus bit rate low-level register
I2C bus bit rate high-level register
I2C bus transmit data register
I2C bus receive data register
I2C bus control register 1
I2C bus control register 2
I2C bus mode register 1
8
8
8
8
8
8
8
8
8
8
8
8
8
I2C bus mode register 2
8
I2C bus mode register 3
8
I2C bus function enable register
I2C bus status enable register
I2C bus interrupt enable register
I2C bus status register 1
8
8
8
ICSR1
ICSR2
SARL0
SARU0
SARL1
SARU1
SARL2
SARU2
ICBRL
ICBRH
ICDRT
ICDRR
SPCR
8
I2C bus status register 2
8
Slave address register L0
Slave address register U0
Slave address register L1
Slave address register U1
Slave address register L2
Slave address register U2
I2C bus bit rate low-level register
I2C bus bit rate high-level register
I2C bus transmit data register
I2C bus receive data register
RSPI control register
8
8
8
8
8
8
8
8
8
8
8
RSPI slave select polarity register
RSPI pin control register
SSLP
8
SPPCR
SPSR
8
RSPI status register
8
RSPI data register
SPDR
16, 32
8
RSPI sequence control register
RSPI sequence status register
SPSCR
SPSSR
8
R01DS0052EJ0110 Rev.1.10
Feb 10, 2011
Page 69 of 146
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