RX62N Group, RX621 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (2 / 35)
Module
Register
Number Access
Number of
Address
Abbreviation Register Name
Abbreviation of Bits
Size
16
16
8
Access Cycles
0008 208Ch
0008 2090h
0008 2093h
0008 2094h
0008 209Ch
0008 209Dh
0008 209Eh
0008 209Fh
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMA block transfer count register
DMCRB
DMTMD
DMINT
16
16
8
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
DMA transfer mode register
DMA interrupt setting register
DMA address mode register
DMA transfer enable register
DMA software start register
DMA status register
DMAMD
DMCNT
DMREQ
DMSTS
DMCSL
16
8
16
8
8
8
8
8
DMA activation source flag control
register
8
8
0008 20C0h
0008 20C4h
0008 20C8h
0008 20CCh
0008 20D0h
0008 20D3h
0008 20D4h
0008 20DCh
0008 20DDh
0008 20DEh
0008 20DFh
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMA source address register
DMA destination address register
DMA transfer count register
DMA block transfer count register
DMA transfer mode register
DMA interrupt setting register
DMA address mode register
DMA transfer enable register
DMA software start register
DMA status register
DMSAR
DMDAR
DMCRA
DMCRB
DMTMD
DMINT
32
32
32
16
16
8
32
32
32
16
16
8
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
DMAMD
DMCNT
DMREQ
DMSTS
DMCSL
16
8
16
8
8
8
8
8
DMA activation source flag control
register
8
8
0008 2200h
0008 2400h
0008 2404h
0008 2408h
0008 240Ch
0008 240Eh
0008 2800h
0008 2804h
0008 2808h
0008 280Ch
0008 2810h
0008 2812h
0008 2813h
0008 2814h
0008 2818h
0008 281Ch
0008 281Dh
0008 281Eh
0008 2820h
DMAC
DMACA start register
DMAST
8
8
2 ICLK
DTC
DTC control register
DTCCR
8
8
2 ICLK
DTC
DTC vector base register
DTCVBR
DTCADMOD
DTCST
32
8
32
8
2 ICLK
DTC
DTC address mode register
DTC module start register
2 ICLK
DTC
8
8
2 ICLK
DTC
DTC status register
DTCSTS
EDMSAR
EDMDAR
EDMCRA
EDMCRB
EDMTMD
EDMOMD
EDMINT
16
32
32
32
16
16
8
16
32
32
32
16
16
8
2 ICLK
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMAC0
EXDMA source address register
EXDMA destination address register
EXDMA transfer count register
EXDMA block transfer count register
EXDMA transfer mode register
EXDMA output setting register
EXDMA interrupt setting register
EXDMA address mode register
EXDMA output setting register
EXDMA transfer enable register
EXDMA software start register
EXDMA status register
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
8
8
EDMAMD
EDMOFR
EDMCNT
EDMREQ
EDMSTS
EDMRMD
32
32
8
32
32
8
8
8
8
8
EXDMA external request sense mode
register
8
8
0008 2821h
0008 2822h
0008 2840h
0008 2844h
0008 2848h
EXDMAC0
EXDMAC0
EXDMAC1
EXDMAC1
EXDMAC1
EXDMA external request flag register
EXDMA peripheral request flag register
EXDMA source address register
EXDMA destination address register
EXDMA transfer count register
EDMERF
EDMPRF
EDMSAR
EDMDAR
EDMCRA
8
8
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
1 to 2 BCLK*10
8
8
32
32
32
32
32
32
R01DS0052EJ0110 Rev.1.10
Feb 10, 2011
Page 53 of 146
RENESAS [ RENESAS TECHNOLOGY CORP ]
