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M37754S4CGP 参数 Datasheet PDF下载

M37754S4CGP图片预览
型号: M37754S4CGP
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片16位CMOS微机 [SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER]
分类和应用: 微控制器和处理器外围集成电路计算机时钟
文件页数/大小: 115 页 / 1558 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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MITSUBISHI MICROCOMPUTERS  
M37754M8C-XXXGP, M37754M8C-XXXHP  
M37754S4CGP, M37754S4CHP  
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER  
1
PM1  
PM0  
0
0
0
1
0
Port  
Microprocessor mode (Note 1)  
Mode  
Single-chip mode  
Memory expansion mode (Note 1)  
E/RD  
Same as left  
Same as left  
(Note 1)  
RD  
(Note 2)  
E
E/RD  
E
E/RD  
E
Port P0  
Port P1  
Port P2  
P00  
to  
P27  
P00  
to  
P27  
I/O port  
Address A0 to A19,A23  
E
BYTE = “L”  
Same as left  
Same as left  
P100  
to  
P107  
Data (even)  
E
P100  
to  
P107  
• Condition except following  
E
I/O port  
Port  
P10  
P100  
to  
P107  
D
(
BYTE = “H”  
• When multiplex bus seld  
___  
accessing CS4 area  
E
Same as left  
P100  
to  
Data  
P107  
o LA7 (odd, even)  
E
Same as left  
Same as left  
BYTE = “L”  
BYTE = “H”  
P117  
Data (odd)  
I/O port  
Port  
P11  
P110  
to  
P117  
I/O port  
P110  
to  
P117  
E
E
P30  
P31  
(Note 2)  
WR  
BHE  
Same as left  
Port P3  
P30  
to  
P33  
I/O port  
ALE  
HLDA  
P32  
P33  
E
E
P40  
to  
P40  
P41  
input  
HOLD  
I/O port  
Clock φ1 is output from P42 regardless of  
bit 7 of processor mode register 0 ; others  
are the same as left (Note 2)  
P47  
input  
RDY  
Port P4  
Clock φ 1 is output from P42 when bit 7 of  
processor mode register 0 is “1”.  
P42  
to  
P47  
I/O port  
Clock φ 1 is output from P42 when bit 7 of  
processor mode register 0 is “1.”  
Fig. 85 Processor modes and ports P0 to P4, P10 and P11  
__  
Notes 1 : E signal is not output in the memory expansion and microprocessor modes.  
__  
2 : The signal output stop disable bit (bit 4 of particular function select register 0) can stop E output in the single-chip mode and φ1 output in the micro-  
___ ___  
processor mode. Similarly, when accessing the internal memory in the memory expansion and microprocessor modes, RD and WR output can be  
fixed to “H”. Refer to Table 8 for details.  
72  
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