MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
Interrupt Request Register 1
b7b6 b5b4b3 b2b1b0
Interrupt request register 1 (IREQ1) [Address 00FC16
]
B
0
Name
Functions
After reset R W
0
0
0
0
0
0
0
0
R ✽
R ✽
R ✽
R ✽
R ✽
R ✽
R ✽
R —
0 : No interrupt request issued
1 : Interrupt request issued
Timer 1 interrupt
request bit (TM1R)
Timer 2 interrupt
request bit (TM2R)
1
2
3
4
5
6
7
0 : No interrupt request issued
1 : Interrupt request issued
Timer 3 interrupt
request bit (TM3R)
0 : No interrupt request issued
1 : Interrupt request issued
Timer 4 interrupt
request bit (TM4R)
0 : No interrupt request issued
1 : Interrupt request issued
OSD interrupt request 0 : No interrupt request issued
bit (CRTR)
1 : Interrupt request issued
V
SYNC interrupt
request bit (VSCR)
A-D conversion • INT3
interrupt request bit (ADR)
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is “0.”
✽: “0” can be set by software, but “1” cannot be set.
Fig. 11. Interrupt Request Register 1
Interrupt Request Register 2
b7b6 b5b4b3 b2b1b0
0
Interrupt request register 2 (IREQ2) [Address 00FD16
]
B
0
Name
Functions
R W
After reset
INT1 interrupt
request bit (INT1R)
0 : No interrupt request issued
1 : Interrupt request issued
0
R ✽
Data slicer interrupt
request bit (DSR)
1
2
3
4
5
6
0 : No interrupt request issued
1 : Interrupt request issued
0
0
0
0
0
0
R ✽
R ✽
R ✽
R ✽
R ✽
R ✽
Serial I/O interrupt
request bit (SIOR)
0 : No interrupt request issued
1 : Interrupt request issued
f(XIN)/4096 interrupt
request bit (1MSR)
0 : No interrupt request issued
1 : Interrupt request issued
INT2 interrupt
request bit (INT2R)
Multi-master I2C-BUS
interrupt request bit (IICR)
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
Timer 5 • 6 interrupt
request bit (T56R)
0 : No interrupt request issued
1 : Interrupt request issued
7
Fix this bit to “0.”
0
R W
✽: “0” can be set by software, but “1” cannot be set.
Fig. 12. Interrupt Request Register 2
19
RENESAS [ RENESAS TECHNOLOGY CORP ]
