MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
CPU Mode Register
b7b6 b5b4b3 b2b1b0
1 1 0 0
CPU mode register (CPUM) (CM) [Address FB16]
B
Name
Functions
After reset R W
Processor mode bits
(CM0, CM1)
b1 b0
0, 1
0
R W
0 0: Single-chip mode
0 1:
1 0:
1 1:
Not available
0: 0 page
1: 1 page
Stack page selection
bit (CM2) (See note)
2
1
R W
3, 4 Fix these bits to “1.”
1
1
R W
R W
0: LOW drive
1: HIGH drive
X
COUT drivability
5
6
selection bit (CM5)
Main Clock (XIN–XOUT
stop bit
)
0
0
R W
R W
0: Oscillating
1: Stopped
(CM6)
Internal system clock
selection bit
(CM7)
7
0: XIN–XOUT selected
(high-speed mode)
1: XCIN–XCOUT selected
(high-speed mode)
Note: This bit is set to “1” after the reset release.
CPU Mode Register
Address 00FB16
Interrupt Request Register 1
b7b6 b5b4b3 b2b1b0
Interrupt request register 1 (IREQ1) [Address 00FC16
]
B
0
Name
Functions
After reset R W
0
0
0
0
0
0
0
0
R ✽
R ✽
R ✽
R ✽
R ✽
R ✽
R ✽
R —
0 : No interrupt request issued
1 : Interrupt request issued
Timer 1 interrupt
request bit (TM1R)
Timer 2 interrupt
request bit (TM2R)
1
2
3
4
5
6
7
0 : No interrupt request issued
1 : Interrupt request issued
Timer 3 interrupt
request bit (TM3R)
0 : No interrupt request issued
1 : Interrupt request issued
Timer 4 interrupt
request bit (TM4R)
0 : No interrupt request issued
1 : Interrupt request issued
OSD interrupt request 0 : No interrupt request issued
bit (CRTR)
1 : Interrupt request issued
V
SYNC interrupt
request bit (VSCR)
A-D conversion • INT3
interrupt request bit (ADR)
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is “0.”
✽: “0” can be set by software, but “1” cannot be set.
Interrupt Request Register 1
Address 00FC16
134
RENESAS [ RENESAS TECHNOLOGY CORP ]
