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M37274EFSP 参数 Datasheet PDF下载

M37274EFSP图片预览
型号: M37274EFSP
PDF下载: 下载PDF文件 查看货源
内容描述: 单片8位CMOS单片机结合闭合字幕解码器和屏幕显示控制器 [SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER]
分类和应用: 解码器显示控制器微控制器和处理器外围集成电路光电二极管瞄准线计算机可编程只读存储器时钟
文件页数/大小: 148 页 / 1926 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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MITSUBISHI MICROCOMPUTERS  
M37274EFSP  
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER  
and ON-SCREEN DISPLAY CONTROLLER  
Interrupt Control Register 2  
b7b6 b5b4b3 b2b1b0  
Interrupt control register 2 (ICON2) [Address 00FF16]  
After reset  
B
0
Name  
Functions  
R W  
R W  
INT1 interrupt  
enable bit (INT1E)  
0
0 : Interrupt disabled  
1 : Interrupt enabled  
Data slicer interrupt  
enable bit (DSR)  
1
2
3
4
0 : Interrupt disabled  
1 : Interrupt enabled  
0
0
0
0
R W  
R W  
R W  
R W  
Serial I/O interrupt  
enable bit (SIOE)  
0 : Interrupt disabled  
1 : Interrupt enabled  
f(XIN)/4096 interrupt  
enable bit (1MSE)  
0 : Interrupt disabled  
1 : Interrupt enabled  
INT2 interrupt enable  
bit (INT2E)  
0 : Interrupt disabled  
1 : Interrupt enabled  
Multi-master I2C-BUS interface  
interrupt enable bit (IICE)  
5
6
7
0 : Interrupt disabled  
1 : Interrupt enabled  
0
0
0
R W  
R W  
R W  
Timer 5 • 6 interrupt  
enable bit (T56E)  
0 : Interrupt disabled  
1 : Interrupt enabled  
Timer 5 • 6 interrupt  
switch bit (TM56S)  
0 : Timer 5  
1 : Timer 6  
Interrupt Control Register 2  
Address 00FF16  
Clock Run-in Register 3  
b7 b6 b5 b4 b3 b2 b1 b0  
Clock run-in register 3 (CR3) [Address 020916  
]
B
Name  
Functions  
After reset  
0
R
W
W
0
to  
3
R
Clock run-in count value of  
sub-data slice line (CR30  
to CR33)  
0: Data is not latched yet Indeterminate  
1: Data is latched  
R
4
Data latch completion flag  
for caption data in sub-  
data slice line (CR34)  
W
W
W
5
6
0: Main data slice line  
1: Sub- data slice line  
Indeterminate  
R
R
Data slice line selection bit  
for interrupt request  
(CR35)  
Interrupt mode selection bit  
(CR36)  
0: Interrupt occurs at end Indeterminate  
of data slice line  
1: Interrupt occurs at  
completion of caption  
data latch  
7
Indeterminate  
R
Nothing is assigned. This bit is a write disable bit.  
When this bit is read out, the value is “0.”  
Clock Run-in Register 3  
Address 020916  
136  
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