MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2
I C Control Register
b7 b6 b5 b4 b3 b2 b1 b0
I2C control register (S1D : address 00F916)
B
Name
Functions
After reset R W
Bit counter
(Number of transmit/recieve
bits)
(BC0 to BC2)
b2 b1 b0
0
0
to
2
R W
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0 : 8
1 : 7
0 : 6
1 : 5
0 : 4
1 : 3
0 : 2
1 : 1
I2C-BUS interface use
enable bit (ESO)
3
4
5
0
0 : Disabled
1 : Enabled
R W
Data format selection bit
(ALS)
0
0 : Addressing mode
1 : Free data format
R W
Addressing format selection
bit (10BIT SAD)
0
0 : 7-bit addressing format
1 : 10-bit addressing format
R W
b7 b6 Connection port (See note)
0
6, 7 Connection control bits
between I2C-BUS interface
and ports
R W
0
0
1
1
0 : None
1 : SCL1, SDA1
0 : SCL2, SDA2
1 : SCL1, SDA1
SCL2, SDA2
Note: When using ports P11-P14 as I2C-BUS interface, the output structure changes
automatically from CMOS output to N-channel open-drain output.
2
I C Control Register
Address 00F916
2
I C Clock Control Register
b7 b6 b5 b4 b3 b2 b1 b0
I2C clock control register (S2 : address 00FA16)
B
Name
Functions
After reset R W
0
0
to
4
SCL frequency control bits
(CCR0 to CCR4)
Setup value of Standard clock
High speed
clock mode
R W
CCR4–CCR0
mode
00 to 02
03
Setup disabled Setup disabled
Setup disabled
Setup disabled
100
333
250
04
05
400 (See note)
166
06
83.3
500/CCR value 1000/CCR value
17.2
16.6
16.1
34.5
33.3
32.3
1D
1E
1F
(at φ = 4 MHz, unit : kHz)
5
SCL mode
specification bit
(FAST MODE)
0 : Standard clock mode
1 : High-speed clock mode
0
R W
6
7
ACK bit
(ACK BIT)
0 : ACK is returned.
1 : ACK is not returned.
0
0
R W
R W
ACK clock bit
(ACK)
0 : No ACK clock
1 : ACK clock
Note: At 4000kHz in the high-speed clock mode, the duty is as below .
“0” period : “1” period = 3 : 2
In the other cases, the duty is as below.
“0” period : “1” period = 1 : 1
2
I C Clock Control Register
Address 00FA16
133