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Som
M
ELI
ARY
IN
MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
s
SFR1 area (addresses C0
16
to DF
16
)
<
Bit allocation
>
<
State immediately after reset
>
:
Name
Function bit
0 : “0” immediately after reset
1 : “1” immediately after reset
? : Indeterminate immediately
after reset
:
:
No function bit
0 : Fix to this bit to “0”
(do not write to “1”)
1 : Fix to this bit to “1”
(do not write to “0”)
Address
Register
b7
Bit allocation
State immediately after reset
b0 b7
b0
C0
16
Port P0 (P0)
C1
16
Port P0 direction register (D0)
C2
16
C3
16
C4
16
C5
16
C6
16
C7
16
C8
16
C9
16
CA
16
CB
16
CC
16
CD
16
CE
16
CF
16
D0
16
D1
16
D2
16
D3
16
D4
16
D5
16
D6
16
D7
16
D8
16
D9
16
DA
16
DB
16
DC
16
DD
16
DE
16
DF
16
Port P1 (P1)
Port P1 direction register (D1)
Port P2 (P2)
Port P2 direction register (D2)
Port P3 (P3)
Port P3 direction register (D3)
Port P4 (P4)
Port P4 direction register (D4)
Port P5 (P5)
OSD port control register (PF)
Port P6 (P6)
Port P7 (P7)
OSD control register (OC)
P6IM T3SC
P46D P45D
0
B
G
R
0
0
0
0
0
0
OUT2 OUT1
OC7 OC6 OC5 OC4 OC3 OC2 OC1 OC0
HP2 HP1 HP0
BC
1
2 BC
1
1 BC
1
0
BC
2
2 BC
2
1 BC
2
0
BC
3
2 BC
3
1 BC
3
0
Horizontal position register (HP)
HP7 HP6 HP5 HP4 HP3
Block control register 1 (BC
1
)
BC
1
7 BC
1
6 BC
1
5 BC
1
4 BC
1
3
Block control register 2 (BC
2
)
BC
2
7 BC
2
6 BC
2
5 BC
2
4 BC
2
3
Block control register 3 (BC
3
)
BC
3
7 BC
3
6 BC
3
5 BC
3
4 BC
3
3
Block control register 4 (BC
4
)
Block control register 5 (BC
5
)
Block control register 6 (BC
6
)
Block control register 7 (BC
7
)
Block control register 8 (BC
8
)
Block control register 9 (BC
9
)
Block control register 10
Block control register 11
BC
4
7 BC
4
6 BC
4
5 BC
4
4 BC
4
3 BC
4
2 BC
4
1 BC
4
0
BC
5
7 BC
5
6 BC
5
5 BC
5
4 BC
5
3 BC
5
2 BC
5
1 BC
5
0
BC
6
7 BC
6
6 BC
6
5 BC
6
4 BC
6
3 BC
6
2 BC
6
1 BC
6
0
BC
7
7 BC
7
6 BC
7
5 BC
7
4 BC
7
3 BC
7
2 BC
7
1 BC
7
0
BC
8
7 BC
8
6 BC
8
5 BC
8
4 BC
8
3 BC
8
2 BC
8
1 BC
8
0
BC
9
7 BC
9
6 BC
9
5 BC
9
4 BC
9
3 BC
9
2 BC
9
1 BC
9
0
(BC
10
)
BC
10
7 BC
10
6 BC
10
5 BC
10
4 BC
10
3 BC
10
2 BC
10
1 BC
10
0
(BC
11
)
BC
11
7 BC
11
6 BC
11
5 BC
11
4 BC
11
3 BC
11
2 BC
11
1 BC
11
0
BC
12
7 BC
12
6 BC
12
5 BC
12
4 BC
12
3 BC
12
2 BC
12
1 BC
12
0
BC
13
7 BC
13
6 BC
13
5 BC
13
4 BC
13
3 BC
13
2 BC
13
1 BC
13
0
BC
14
7 BC
14
6 BC
14
5 BC
14
4 BC
14
3 BC
14
2 BC
14
1 BC
14
0
BC
15
7 BC
15
6 BC
15
5 BC
15
4 BC
15
3 BC
15
2 BC
15
1 BC
15
0
BC
16
7 BC
16
6 BC
16
5 BC
16
4 BC
16
3 BC
16
2 BC
16
1 BC
16
0
Block control register 12 (BC
12
)
Block control register 13 (BC
13
)
Block control register 14 (BC
14
)
Block control register 15 (BC
15
)
Block control register 16 (BC
16
)
?
00
16
?
00
16
?
00
16
?
00
16
?
00
16
?
00
16
?
0 0
00
16
00
16
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
Fig. 5. Memory Map of Special Function Register 1 (SFR1) (1)
12