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M37270EFSP 参数 Datasheet PDF下载

M37270EFSP图片预览
型号: M37270EFSP
PDF下载: 下载PDF文件 查看货源
内容描述: 单片8位CMOS单片机结合闭合字幕解码器和屏幕显示控制器 [SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER]
分类和应用: 解码器显示控制器瞄准线计算机
文件页数/大小: 95 页 / 1505 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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MITSUBISHI MICROCOMPUTERS  
M37270MF-XXXSP  
M37270EF-XXXSP, M37270EFSP  
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER  
and ON-SCREEN DISPLAY CONTROLLER  
A-D CONVERTER  
(5)Comparator and Control Circuit  
(1)A-D Conversion Register (AD)  
A-D conversion reigister is a read-only register that stores the result  
of an A-D conversion. This register should not be read during A-D  
conversion.  
The conversion result of the analog input voltage and the reference  
voltage “Vref” is stored in the A-D conversion register. The A-D con-  
version completion bit and A-D conversion interrupt request bit are  
set to “1” at the completion of A-D conversion.  
(2)A-D Control Register (ADCON)  
The A-D control register controls A-D conversion. Bits 1 and 0 of this  
7
0
0
register select analog input pins. When these pins are not used as  
anlog input pins, they are used as ordinary I/O pins. Bit 3 is the A-D  
conversion completion bit, A-D conversion is started by writing “0” to  
this bit. The value of this bit remains at “0” during an A-D conversion,  
then changes to “1” when the A-D conversion is completed.  
Bit 4 controls connection between the resistor ladder and VCC. When  
not using the A-D converter, the resistor ladder can be cut off from  
the internal VCC by setting this bit to “0.” This can realize the low-  
power dissipation.  
A-D control register  
(ADCON: address 00EF16)  
Analog input pin selection bits  
b1 b0  
0 0 : P26/AD1  
0 1 : P25/AD2  
1 0 : P24/AD3  
1 1 : P40/AD4  
A-D conversion completion bit  
0 : Conversion in purogress  
1 : Conversion completed  
(3)Comparison Voltage Generator (Resistor  
Ladder)  
VCC connection selection bit  
0 : OFF  
The voltage generator divides the voltage between VSS and VCC by  
256, and outputs the divided voltages to the comparator as the refer-  
ence voltage Vref.  
1 : ON  
Fix this bit to “0.”  
(4)Channel Selector  
The channel selector connects an analog input pin selected by bits 1  
Fig. 15. Structure of A-D control register  
and 0 of the A-D control register to the comparator.  
Data bus  
b7  
b0  
A-D control register  
(address 00EF16)  
2
A-D conversion  
interrupt request  
A-D control circuit  
P26/AD1  
P25/AD2  
P24/AD3  
Compa-  
rator  
A-D conversion register  
8
(address 00EE16)  
P40/AD4  
Switch tree  
Resistor ladder  
VSS VCC  
Fig. 16. A-D comparator block diagram  
23  
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